HT-CN410DVH
50
IC201, Programmable Multimedia and DSP Processor (ES6809PADF)
Table 1 ES6809 Pin Description (Continued):
Names Pin Numbers I/O Definitions
VDAC
110
O VideoDAC output. Refer to description and matrix for UDAC pin 115.
YUV6 O YUV pixel 6 ouput data.
PIXOUT6 O CCIR656 output pixel 6.
VD33_DA 111 P Poer for I/O power supply for VDAC.
VS33_DA 112 G Ground for I/O power supply for VDAC.
YDAC
113
O VideoDAC output. Refer to description and matrix for UDAC pin 115.
YUV5 O YUV pixel 5 ouput data.
PIXOUT5 O CCIR656 output pixel 5.
CDAC
114
O VideoDAC output. Refer to description and matrix for UDAC pin 115.
YUV2 O YUV pixel 2 ouput data.
PIXOUT2 O CCIR656 output pixel 2.
UDAC 115 O Video DAC ouput
YUV0 O
YUV pixel 0 output data.
PIXOUT0 O
CCIR665 ouput pixel 0.
ADC_BIAS 116 O
Audio ADC bias voltage out.
MIC 117 I
Audio ADC MIC 1.
ADC_CAP 118 O
Audio ADC output capacitance.
TWS 119 O
Audio transmit frame sync output.
AOUT_O1L O
Audio left channel 1 out.
TSD0
120
O
Audio transmit serial data port 0.
AOUT_O2L O
Audio left channel 2 out.
TSD1
121
O
Audio transmit serial data port 1.
AOUT_O2R O
Audio right channel 2 out.
F : CVBS/Chroma signal for simultaneous mode.
Y : Luma component for YUV and Y/C processing.
C : Chrominance signal for Y/C processing.
U : Chrominance component signal for YUV mode.
V : Chrominance component signal for YUV mode.
PIN 109 110 113 114 115
Value F DAC V DAC Y DAC C DAC U DAC
0 CVBS/Chroma CVBS1 Y C N/A
1 CVBS/Chroma CVBS1 Y C CVBS2
2 CVBS/Chroma N/A Y C N/A
3 CVBS/Chroma CVBS1 N/A N/A CVBS2
4 CVBS/Chroma CVBS1 N/A N/A N/A
5 CVBS/Chroma CVBS1 Y Pb Pr
6 CVBS/Chroma N/A Y Pb Pr
7 N/A SYNC G B R
8 CVBS/Chroma Chroma Y Pb Pr
9 CVBS CVBS1 G B R
10 CVBS CVBS1 G R B
11 N/A SYNC G R B
12 CVBS/Chroma N/A Y Pr Pb
13 CVBS/Chroma CVBS1 Y Pr Pb
14 Chroma Y G R B