Sharp LC-26DA5U - Canadian Ratings and V-CHIP Control

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LC-26DA5U
LC-32DA5U
● IC3301 (IXB405WJ)
Video processor, which sends an LVDS signal to LCD, featuring analog input ADC, 3D Y/C separation for
NTSC/PAL, noise reduction, sync separation, format conversion, picture/image quality control, VBI slicer, and
OSD.
● IC3302 (IXB375WJ)
128 Mbit GDDR SDRAM (1 M x 32 bits x 4 banks Graphic Double Data Rate Synchronous DRAM). Work
memory for the video processor.
● IC3303 (IXA361WJ)
DDR Termination Regulator. Regulator for DDR-SDRAM termination.
● IC3201 (DS90C386)
LVDS (Low Voltage Differential Signaling) Receiver 24-Bit Flat Panel Display (FPD) Link - 85 MHz. Converts an
LVDS signal to 28 bits (24-bit RGB signal, 48-bit Hsync, Vsync, Data Enable, or CNTL) of a CMOS (LVTTL)
signal. Sends received clock (RCLKOUT) at CMOS level.
● IC3202 (D90C385A)
LVDS Transmitter 24-Bit Flat Panel Display (FPD) Link - 85 MHz. Converts 28 bits of an LVTTL signal to an
LVDS signal.
● IC3204 (ICS570B)
Zero Delay Buffer. Sends a clock synchronized with the leading edge of an input clock.