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Sharp MZ-80B
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103
Table 4.4-1 lists how each flag bit
is
affected by various
CPU
instructions. In this table a
'e'
indicates that the
instruction does not change the flag, an 'X' means that the flag goes to an indeterminate state, a
'0'
means that it
is
reset, a
'1'
means that it
is
set and the symbol
'i'
indicates that it
is
set or reset according to the previous discussion.
Note that any instruction not appearing in this table does
not
affect any
of
the flags.
Table 4.4-1 includes a few special cases that must be described for clarity. Notice that the block search instruction
sets the
Z
flag
if the last compare operation indicated a match between the source and the accumulator data. Also, the
parity
flag
is
set
if
the byte counter (register pair
BC)
is
not equal to zero. This same
use
of
the parity flag
is
made with
the block move instructions. Another special
case
is
during block input or output instructions, here the Z
flag
is
used to
indicate the state
of
register B which
is
used
as
a byte counter. Notice that when the
1/0
block transfer
is
complete, the
zero flag will be reset
to
a zero (i.e. B = 0) while in the
case
of
a block move command the parity
flag
is
reset when the
operation
is
complete. A final
case
is
when the refresh or 1 register
is
loaded into the accumulator, the interrupt enable
flip
flop
is
loaded into the parity flag
so
that the complete state
of
the
CPU
can be saved at any time.

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