Siemens TC65 - Figure 24: PCM Timing

TC65 Hardware Interface Description
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TC65_HD_V00.521 Page 60 of 99 24.05.2005
The timing of a PCM short frame is shown in Figure 24. In PCM mode, 16-bit data are
transferred in both directions at the same time. The duration of a frame sync pulse is one
BITCLK period, starting at the rising edge of BITCLK. TXDAI data is shifted out at the next
rising edge of BITCLK. The most significant bit is transferred first. Data transmitted from
RXDAI of the internal application is sampled at the falling edge of BITCLK.
BITCLK
TXDAI
RXDAI
FS
MSB
MSB
LSB
LSB
14 13
14 13
1
1
12
12
2
2
LSB1
1
LSB
MSB 14
MSB 14
125µs
Figure 24: PCM timing