Register Address Description (Same as) Address
0x0123 OUT5_CM, OUT5_AMPL 0x0105
0x0124 OUT5_MUX_SEL, OUT5_VDD_SEL_EN, OUT5_VDD_SEL, OUT5_INV 0x0106
0x0126 OUT6_PDN, OUT6_OE, OUT6_RDIV_FORCE2 0x0103
0x0127 OUT6_FORMAT, _SYNC_EN, DIS_STATE, _CMOS_DRV 0x0104
0x0128 OUT6_CM, OUT6_AMPL 0x0105
0x0129 OUT6_MUX_SEL, OUT6_VDD_SEL_EN, OUT6_VDD_SEL, OUT6_INV 0x0106
0x012B OUT7_PDN, OUT7_OE, OUT7_RDIV_FORCE2 0x0103
0x012C OUT7_FORMAT, _SYNC_EN, DIS_STATE, _CMOS_DRV 0x0104
0x012D OUT7_CM, OUT7_AMPL 0x0105
0x012E OUT7_MUX_SEL, OUT7_VDD_SEL_EN, OUT7_VDD_SEL, OUT7_INV 0x0106
0x0130 OUT8_PDN, OUT8_OE, OUT8_RDIV_FORCE2 0x0103
0x0131 OUT8_FORMAT, _SYNC_EN, DIS_STATE, _CMOS_DRV 0x0104
0x0132 OUT8_CM, OUT8_AMPL 0x0105
0x0133 OUT8_MUX_SEL, OUT8_VDD_SEL_EN, OUT8_VDD_SEL, OUT8_INV 0x0106
0x0135 OUT9_PDN, OUT9_OE, OUT9_RDIV_FORCE2 0x0103
0x0136 OUT9_FORMAT, _SYNC_EN, DIS_STATE, _CMOS_DRV 0x0104
0x0137 OUT9_CM, OUT9_AMPL 0x0105
0x0138 OUT9_MUX_SEL, OUT9_VDD_SEL_EN, OUT9_VDD_SEL, OUT9_INV 0x0106
0x013A OUT9A_PDN, OUT9A_OE, OUT9A_RDIV_FORCE2 0x0103
0x013B OUT9A_FORMAT, _SYNC_EN, DIS_STATE, _CMOS_DRV 0x0104
0x013C OUT9A_CM, OUT9A_AMPL 0x0105
0x013D OUT9A_MUX_SEL, OUT9A_VDD_SEL_EN, OUT9A_VDD_SEL,
OUT9A_INV
0x0106
Table 15.45. 0x013F–0x0140
Reg Address Bit Field Type Setting Name Description
0x013F 7:0 R/W OUTX_ALWAYS_ON This setting is managed by CBPro during
zero delay mode.
0x0140 11:8 R/W OUTX_ALWAYS_ON
Table 15.46. 0x0141
Reg Address Bit Field Type Setting Name Description
0x0141 5 R/W OUT_DIS_LOL_MS
K
Set by CBPro
0x0141 7 R/W OUT_DIS_MSK_LO
S_PFD
Set by CBPro
Si5391 Reference Manual • Si5391A/B Register Map
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