Sony SCD-XE800 - Page 34

SCD-XE800
34
Pin No. Pin Name I/O Description
165, 166 AVDD3 - Power supply terminal (+3.3V)
167 EXT_CAP - Not used
168, 169 AGND3, AGND18 - Ground terminal
170 TXCN O TMDS clock signal (negative) output to the HDMI OUT connector Not used
171 TXCP O TMDS clock signal (positive) output to the HDMI OUT connector Not used
172 AVDD18 - Power supply terminal (+1.8V)
173 TX0N O TMDS data (negative) output to the HDMI OUT connector Not used
174 TX0P O TMDS data (positive) output to the HDMI OUT connector Not used
175 AGND18 - Ground terminal
176 TX1N O TMDS data (negative) output to the HDMI OUT connector Not used
177 TX1P O TMDS data (positive) output to the HDMI OUT connector Not used
178 AVDD18 - Power supply terminal (+1.8V)
179 TX2N O TMDS data (negative) output to the HDMI OUT connector Not used
180 TX2P O TMDS data (positive) output to the HDMI OUT connector Not used
181 AGND18 - Ground terminal
182, 183 R/Cr/Pr, B/Cb/Pb O Component video signal output terminal Not used
184 DACVSSA - Ground terminal
185 Y/G O Component video signal output terminal Not used
186 DACVDDA - Power supply terminal (+3.3V)
187 CVBS O Video signal output terminal (for TEST MODE)
188 DACVSSB - Ground terminal
189 C O Chroma signal output terminal Not used
190 DACVDDB - Power supply terminal (+3.3V)
191 Y O Y signal output terminal Not used
192 DACVSSC - Ground terminal
193 FS - Full scale adjustment terminal Fixed at “L” in this set
194 VREF - For reference voltage terminal
195 DACVDDC - Power supply terminal (+3.3V)
196 VBUS_OE O VBUS control signal output terminal Not used
197 VBUS_OC I VBUS control signal input terminal Fixed at “H” in this set
198 SCORE/DIR_XSTATE I Source clock switching monitor input terminal Not used
199 SPMCK O Master clock signal output terminal Not used
200 SPBCK O Bit clock signal output terminal Not used
201 SPLRCK O L/R sampling clock signal output terminal Not used
202 ADIN(SPDATA) I Audio serial data input terminal Not used
203 ACLK O Master clock signal output terminal Not used
204 ABCK O Bit clock signal output to the D/A converter
205 ALRCK O L/R sampling clock signal output to the D/A converter
206 MC_DATA(ADIN) I Audio serial data input terminal Not used
207 DVDD3 - Power supply terminal (+3.3V)
208 NO_USE O Fixed at “L” in this set
209 WIDE O Normal/squeeze selection signal output terminal
210 RGB_SEL/DSEL O Audio muting signal output to the system controller
211 TRG_SW O Trigger detection switch output terminal
212 DVDD18 - Power supply terminal (+1.8V)
213 KMOD O Karaoke mode status signal output terminal
214 XVOICE/DIR_CSFCAG I Detection of MIC signal input terminal Not used
215 SPDIF O SPDIF digital audio signal output to the D/A converter
216 APLLVDD3 - Power supply terminal (+3.3V)
217 APLLCAP - Connection terminal for an external capacitor
218 to 220
APLLVSS, ADACVSS2,
ADACVSS1
- Ground terminal
221 DIR_CE - Not used
222 ASDATA3 O Audio serial data output to the D/A converter
223 ASDATA2 O Audio serial data output terminal Not used
224 AVCM - Not used
225 ASDATA1 O Audio serial data output terminal Not used
226 ASDATA0 O Audio serial data output terminal
227 DIR_CL - Not used