ST PowerSTEP01 EVLPOWERSTEP01 - Table 3. Master SPI Connector Pinout (J5); Table 4. Slave SPI Connector Pinout (J7)

Name Type Function
JP5 Jumper VCC to VCCREG jumper
JP6 Jumper VCCREG to VREG jumper
JP7 Jumper VREG to VDD jumper
JP8 Jumper VDD to 3.3 V from SPI connector jumper
JP9 Jumper Daisy chain termination jumper
JP10 Jumper STBY to VS pull-up jumper
Table 3. Master SPI connector pinout (J5)
Pin number Type Function
1 Open drain output powerSTEP01 BUSY output
2 Open drain output powerSTEP01 FLAG output
3 Ground Ground
4 Supply EXT_VDD (can be used as external logic power supply)
5 Digital output
SPI “Master In Slave Out” signal (connected to powerSTEP01 SDO output through daisy
chain termination jumper JP9)
6 Digital input SPI “Serial Clock” signal (connected to powerSTEP01 CK input)
7 Digital input SPI “Master Out Slave In” signal (connected to powerSTEP01 SDI input)
8 Digital input SPI “Slave Select” signal (connected to powerSTEP01 CS input)
9 Digital input powerSTEP01 step-clock input
10 Digital input powerSTEP01 standby/reset input
Table 4. Slave SPI connector pinout (J7)
Pin number
Type Function
1 Open drain output powerSTEP01 BUSY output
2 Open drain output powerSTEP01 FLAG output
3 Ground Ground
4 Supply EXT_VDD (can be used as external logic power supply)
5 Digital output SPI “Master In Slave Out” signal (connected to pin 5 of J5)
6 Digital input SPI “Serial Clock” signal (connected to powerSTEP01 CK input)
7 Digital input SPI “Master Out Slave In” signal (connected to powerSTEP01 SDO output)
8 Digital input SPI “Slave Select” signal (connected to powerSTEP01 CS input)
9 Digital input powerSTEP01 step-clock input
10 Digital input powerSTEP01 standby/reset input
UM1829
Board description
UM1829 - Rev 2
page 3/21