2.1.2 Digital circuit core supply (Vcore)
As shown in Figure 2. System supply configuration, the digital power can be supplied either by the internal linear
voltage regulator, the embedded SMPS step-down converter or directly by an external supply voltage (regulator
bypass). The SMPS step-down converter can also be cascaded with the linear voltage regulator.
In system Run mode, this digital core voltage can be set dynamically to the required performance (voltage scaling
VOS0 to VOS3).
In system Stop mode, the digital core voltage can be reduced to improve the power consumption (voltage scaling
SVOS3 to SVOS5).
For a detailed definition on the available power modes please read the power control (PWR) chapter of the
reference manual STM32H723/733, STM32H725/735 and STM32H730 advanced Arm
®
-based 32-bit MCUs
(RM0468).
2.1.3 Independent analog supply and reference voltage
To improve analog peripheral performance, the analog peripherals feature an independent power supply which
can be separately filtered and shielded from noise on the PCB:
• The analog supply voltage input is available on a separate VDDA pin.
• An isolated ground connection is provided on the VSSA pin.
To ensure better ADC and DAC accuracy, the reference voltage can be provided externally through the VREF+
pin, this however is not available in all packages.
The VREF– pin is available on some packages to improve the ground noise immunity.
The V
DDA
minimum value (V
DDA_MIN
) depends on the analog peripheral and on whether a reference voltage is
provided or not, refer to Table 2. Power supply connection for more details.
2.1.4 Independent USB transceiver power supply
There are different ways to supply the USB transceivers, depending on V
DD33USB
and V
DD50USB
availability:
• When the VDD50USB pin is available, it can be used to supply an internal regulator dedicated to the USB
transceivers.
• In this case, either the USB VBUS or an external power supply can be used to provide the required voltage.
• The internal regulator output supply is connected to the USB FS PHY and is also available on the
VDD33USB pin (see Figure 1. Power supplies).
In this configuration, the V
DD50USB
voltage can rise either before or after the V
DD
power supply (see
Figure 6. VDD50USB power supply).
An external capacitor must be connected to VDD33USB (see Table 2. Power supply connection).
• When the VDD33USB pin is available, it can be used to supply the internal transceiver. In this case, the
VDD33USB pin should receive a voltage ranging between 3.0 to 3.6 V. If the VDD50USB pin is available
and the internal USB regulator is not used, V
DD50USB
must be connected with the VDD33USB pin. As an
example, when the device is powered at 1.8 V, an independent 3.3 V power supply can be applied to
V
DD33USB
.
When V
DD33USB
is connected to a separate power supply, it is independent from V
DD
and V
DDA
. In this case, it
must be the last supply to be turned on and the first supply to be switched off. The following conditions must be
respected (see Figure 5. VDD33USB connected to external power supply):
• During the power-on and power-down phases (V
DD
< V
DD
minimum value), V
DD33USB
should always be
lower than V
DD
.
• V
DD33USB
rising and falling time specifications must be adhered to (refer to table power-up/power-down
operating conditions for regulator on and table power-up/power-down operating conditions for regulator off
provided in the STM32H72x and STM32H73x datasheets).
• In operating mode, V
DD33USB
can be either lower or higher than V
DD
:
If a USB interface is used (USB OTG_HS / OTG_FS), the associated GPIOs powered by V
DD33USB
operate
between V
DD33USB_MIN
and V
DD33USB_MAX
(see Figure 5. VDD33USB connected to external power supply).
• On some packages neither the VDD33USB pin, nor the VDD50USB pin are available, it is the VDD pin
which supplies the V
DD33USB
through an internal connection.
• In this case, V
DD
is constrained by V
DD33USB
and must range between 3.0V and 3.6V
AN5419
Introduction
AN5419 - Rev 2
page 10/50
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