Contents
1 General information ...............................................................2
2 Power supplies ....................................................................3
2.1 Introduction ...................................................................3
2.1.1 External power supplies and components ......................................7
2.1.2 Digital circuit core supply (Vcore) ...........................................10
2.1.3 Independent analog supply and reference voltage ..............................10
2.1.4 Independent USB transceiver power supply ...................................10
2.1.5 Battery backup domain ...................................................12
2.1.6 LDO voltage regulator ....................................................12
2.1.7 SMPS step-down converter................................................14
2.2 Reset and power supply supervisor ..............................................15
2.2.1 Power-on reset (POR)/power-down reset (PDR)................................15
2.2.2 BrownOut reset (BOR) ...................................................16
2.2.3 Programmable voltage detector (PVD) .......................................16
2.2.4 Analog voltage detector (AVD) .............................................17
2.2.5 System reset ...........................................................17
2.2.6 Bypass mode ..........................................................17
3 Clocks............................................................................18
3.1 Introduction ..................................................................18
3.1.1 HSE and LSE bypass (external user clock) ....................................22
3.1.2 External crystal/ceramic resonator (HSE crystal) ...............................22
3.2 LSE oscillator clock............................................................23
3.3 Clock security system (CSS) ....................................................23
3.4 Clock recovery system (CRS) ...................................................23
4 Alternate function mapping to pins ...............................................24
4.1 Analog inputs for ADC1, ADC2 and ADC3 ........................................24
4.1.1 Packages having Pxy_C and Pxy pads available ...............................24
4.1.2 Packages having Pxy_C but not the peer Pxy..................................25
4.1.3 Package having Pxy available but nor the peer Pxy_C ...........................25
5 Boot configuration................................................................26
AN5419
Contents
AN5419 - Rev 2
page 45/50
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