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ST STM32H723ZG

ST STM32H723ZG
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Introduction
This application note is intended for system designers who develop applications based on STM32H723/33, STM32H725/35 and
STM32H730 microcontroller lines, and need an implementation overview of the following hardware features:
Power supply
Package selection
Clock management
Reset control
Boot mode settings
Debug management.
This document describes the minimum hardware resources required to develop an application based on STM32H723/33,
STM32H725/35 and STM32H730 microcontrollers.
Reference documents
STM32H72x and STM32H73x datasheets
STM32H723/733, STM32H725/735 and STM32H730 advanced Arm
®
-based 32-bit MCUs (RM0468)
STM32H723/733, STM32H725/735 and STM32H730 errata sheet (ES0491)
The following documents are available on www.st.com website.
Oscillator design guide for STM8S, STM8A and STM32 microcontrollers application note (AN2867)
STM32 microcontroller system memory boot mode application note (AN2606).
Getting started with STM32H723/733, STM32H725/735 and STM32H730 Value
Line hardware development
AN5419
AN5419 - Rev 2 - May 2020
For further information contact your local STMicroelectronics sales office.
www.st.com

Table of Contents

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ST STM32H723ZG Specifications

General IconGeneral
SeriesSTM32H7
CoreARM Cortex-M7
Core Size32-bit
Max Clock Frequency550MHz
GPIO Pins168
ADC Resolution16-Bit
Number of ADCs3
DAC Resolution12-bit
Number of DACs2
Oscillator TypeInternal, External
Program Memory TypeFlash
Flash Memory1 MB
Communication InterfacesI2C, SPI, UART, CAN, USB
Operating Voltage1.62V to 3.6V
Operating Temperature-40°C to 85°C
PeripheralsDMA

Summary

Power Supplies

External Power Supplies and Components

Details external components and voltage ranges for power supply connections.

Digital Core Supply (Vcore)

Explains Vcore supply options and voltage scaling for different power modes.

LDO Voltage Regulator

Details the functionality, modes, and configuration of the Low-Drop Out voltage regulator.

SMPS Step-Down Converter

Describes the embedded switch mode power supply for efficient, high-frequency power conversion.

Reset and Power Supply Supervisor

Power-On Reset (POR)Power-Down Reset (PDR)

Explains the integrated POR/PDR circuitry for stable operational start-up from a specified voltage.

Brownout Reset (BOR)

Details the BOR feature to maintain system reset below a selected VDD threshold.

System Reset

Lists the various events that can trigger a system reset, including watchdog and software resets.

Clocks

Clock Security System (CSS)

Covers the CSS for HSE and LSE oscillators to detect clock failures and ensure system reliability.

Alternate Function Mapping to Pins

Analog Inputs for ADC1, ADC2, and ADC3

Details specialized pads (Pxy_C) for ADC inputs, enhancing performance by avoiding parasitic impedances.

Boot Configuration

Boot Mode Selection

Details selecting boot modes (User Flash or System Flash) via BOOT pin and option bytes.

Boot Pin Connection

Illustrates the external connection required for selecting the boot memory via the BOOT pin.

System Bootloader Mode

Describes the embedded bootloader, programmed by ST, used for Flash memory reprogramming.

Debug Management

SWJ Debug Port (Serial Wire and JTAG)

Explains the integrated serial wire (SW-DP) and JTAG debug port (SWJ-DP) combining ARM CoreSight features.

Recommendations

Recommended PCB Routing Guidelines

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