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General| Brand | ST |
|---|---|
| Model | STM32H7 3 Series |
| Category | Microcontrollers |
| Language | English |
Overview of power supply, clock, reset, boot modes, and debug features.
Specifies the essential hardware components for STM32H7x3 development.
Details on VDD, analog, USB, and backup power supplies.
VDDA, VSSA, VREF+ for analog peripherals, accuracy.
VDD33USB and VDD50USB for USB transceivers, voltage ranges.
Powering RTC, backup registers, and SRAM when VDD is off.
Core voltage regulation, VOS levels, and VCAP requirements.
VDD, VDDA, VDD33USB/VDD50USB connections and decoupling caps.
VBAT, VREF+ for analog, and VDDLDO connections with VCAPs.
Integrated POR/PDR for reliable operation starting from 1.71 V.
Monitors VDD against a threshold, triggers interrupts on voltage changes.
Monitors VDDA against a threshold, triggers interrupts.
Events triggering system reset (NRST, watchdog, software).
Using PDR_ON pin to enable/disable internal reset functionalities.
Bypassing power management unit, core supply via VCAPx.
Recommends STM32CubeMX tool for exploring peripheral pin assignments.
HSI, CSI, HSE, PLL, LSI, LSE clock sources for the microcontroller.
Using external clock or crystal/ceramic resonator for HSE.
Using external clock or crystal/ceramic resonator for LSE.
CSS for HSE and LSE to detect failures and switch sources.
Selecting boot space via BOOT pin and option bytes.
Embedded bootloader for Flash programming via serial interfaces.
Components for connecting host PC to the evaluation board for debugging.
ARM CoreSight SWJ-DP for combined JTAG and SW debugging.
Trace port for capturing execution data, 4 data lines + clock.
TRGIN/TRGOUT or TRGIO pins for external debug triggering.
Detailed pin assignments for SWJ-DP functionality.
Releasing SWJ-DP pins for general-purpose I/O usage.
Internal pull-up/pull-down resistors on JTAG pins.
Wiring the SWJ debug port to a standard JTAG connector.
Using multilayer PCBs with dedicated ground/power planes.
Strategic component placement and proper grounding for EMI reduction.
Using decoupling capacitors close to MCU pins for noise reduction.
Optimizing EMC by studying signals and configuring unused resources.
Overview of the STM32H753XI based reference design.
LSE and HSE crystal usage for RTC and main clock.
Reset sources and power supply connections for the reference design.
References to boot config and debug sections.
Lists of essential and optional components for the reference design.
Choosing stack-ups for signal integrity and impedance matching.
Guidelines for crystal oscillator layout and power supply decoupling.
Signal layout for SDMMC, FMC, and QUADSPI interfaces.
Signal layout guidelines for the ETM interface.
