ST STM32H74xI/G User Manual

May 2019 AN4938 Rev 4 1/46
1
AN4938
Application note
Getting started with STM32H74xI/G and STM32H75xI/G
hardware development
Introduction
This application note is intended for system designers who develop applications based on
STM32H750 Value line, STM32H742, STM32H743/753, STM32H745/755 and
STM32H747/757 lines, and who need an implementation overview of the following
hardware features:
• Power supply
• Package selection
• Clock management
• Reset control
• Boot mode settings
• Debug management.
This document describes the minimum hardware resources required to develop an
applica
tion based on STM32H74xI/G and STM32H75xI/G microcontrollers.
Reference documents
The following documents are available on www.st.com:
• STM32H742xI/G and STM32H74
3xI/G datasheet
• STM32H745xI/G datasheet
• STM32H747xI/G datasheet
• STM32H750xB datasheet
• STM32H753xI/G datasheet
• STM32H755xI/G datasheet
• STM32H757xI/G datasheet
• Oscillator design guide for STM8S, STM8A and STM32 microcontrollers application note
(AN2867)
• STM32 microcontroller system memory boot mode application note (AN2606).
Table 1. Applicable products
Generic part numbers Corresponding product lines
STM32H74xI/G,
STM32H75xI/G
STM32H742, STM32H750 Value, STM32H743/753,
STM32H745/755, STM32H747/757
www.st.com

ST STM32H74xI/G Specifications

General

Brand	ST
Model	STM32H74xI/G
Category	Microcontrollers
Language	English

Summary

Introduction

Reference documents

1 General information

2 Power supplies

2.1 Introduction

Introduces the power supply aspects and considerations for STM32H7xx devices.

2.2 Power supply scheme

Outlines the overall power supply architecture, external connections, and decoupling.

2.3 Reset and power supply supervisor

Explains reset sources, power-on/down resets, and voltage supervisors.

3 Alternate function mapping to pins

4 Clocks

4.1 HSE oscillator clock

Covers High-Speed External oscillator clock options: bypass and crystal.

4.2 LSE oscillator clock

Describes Low-Speed External oscillator clock options: bypass and crystal.

4.3 Clock security system (CSS)

Explains the clock security system for detecting HSE and LSE clock failures.

5 Boot configuration

5.1 Boot mode selection

Details how to select boot modes using BOOT pin and option bytes.

5.2 Boot pin connection

Explains the external connection required for boot mode selection.

5.3 System bootloader mode

Describes the system bootloader and its communication peripherals.

6 Debug management

6.1 Introduction

Introduces the host/target interface and its components for debugging.

6.2 SWJ debug port (serial wire and JTAG)

Details the Serial Wire/JTAG Debug Port (SWJ-DP) and its interfaces.

6.3 Pinout and debug port pins

Discusses pin configurations related to debugging and debug ports.

7 Recommendations

7.1 Printed circuit board

Guidelines for PCB layout, layers, and grounding.

7.2 Component position

Recommendations for component placement to reduce EMI and cross-coupling.

7.3 Ground and power supply (VSS,VDD)

Best practices for ground and power supply routing and loop minimization.

7.4 Decoupling

Explains decoupling capacitor placement, types, and impedance considerations.

7.5 Other signals

Tips for managing other signals like noisy and sensitive signals for EMC.

7.6 Unused I/Os and features

Strategies for handling unused MCU resources to improve EMC performance.

8 Reference design

8.1 Reference design description

Describes the core components, clock sources, reset, boot mode, SWJ, and power supply of the reference design.

8.2 Component references

Lists mandatory and optional components used in the reference design.

9 Recommended PCB routing guidelines for STM32H74xl/G and STM32H75xl/G devices

9.1 PCB stack-up

Details different PCB layer stack-up configurations for impedance matching and EMC.

9.2 Crystal oscillator

Offers guidance on layout and routing of crystal oscillator circuits.

9.3 Power supply decoupling

Explains power supply decoupling best practices to prevent noise.

9.4 High speed signal layout

Guides on layout for high-speed signal integrity, including SDMMC, FMC, QUADSPI, ETM.

10 Conclusion

11 Revision history