ST STM32H74xI/G User Manual

Clocks AN4938
22/46 AN4938 Rev 4
4.1.1 External user clock (HSE bypass)
In this mode, an external clock source must be provided. The user selects this mode by
setting the HSEBYP and HSEON bits in the RCC clock control register (RCC_CR). The
external clock signal (square, sinus or triangle) with ~50% duty cycle has to drive the
OSC_IN pin.
4.1.2 External crystal/ceramic resonator (HSE crystal)
The external oscillator frequency ranges from 4 to 48 MHz. The external oscillator has the
advantage of producing a very accurate main clock. The associated hardware configuration
is shown in Figure 11. Using a 25 MHz oscillator frequency is a good c
hoice to get accurate
Ethernet, USB OTG high-speed peripheral, I2S and SAI.
The resonator and the load capacitors have to be
connected as close as possible to the
oscillator pins in order to minimize the output distortion and startup stabilization time. The
load capacitance values must be adjusted according to the selected oscillator.
For CL1 and CL2 it is recommended to use high-quality ceramic capacitors in the 5 pF to
25 pF range (typical), designed for high-frequency ap
plications and selected to meet the
requirements of the crystal or resonator. CL1 and CL2, are usually the same value. The
crystal manufacturer typically specifies a load capacitance that is the series combination of
CL1 and CL2. The PCB and MCU pin capacitances must be included when sizing CL1 and
CL2 (10 pF can be used as a rough estimate of the combined pin and board capacitance).
The HSERDY flag in the RCC clock control registe
r (RCC_CR) indicates if the high-speed
external oscillator is stable or not. At startup, the clock is not released until this bit is set by
hardware. An interrupt can be generated if enabled in the RCC clock interrupt register
(RCC_CIR).
If it is not used as clock source, the HSE crystal can be switched ON and OFF using the
HSEON
bit in the RCC clock control register (RCC_CR).
4.2 LSE oscillator clock
The low-speed external clock signal (LSE) can be generated from two possible clock
sources:
• LSE user external clock (see Figure 12).
• LSE external crystal/ceramic resonator (see Figure 13).

ST STM32H74xI/G Specifications

General

Brand	ST
Model	STM32H74xI/G
Category	Microcontrollers
Language	English

Summary

Introduction

Reference documents

1 General information

2 Power supplies

2.1 Introduction

Introduces the power supply aspects and considerations for STM32H7xx devices.

2.2 Power supply scheme

Outlines the overall power supply architecture, external connections, and decoupling.

2.3 Reset and power supply supervisor

Explains reset sources, power-on/down resets, and voltage supervisors.

3 Alternate function mapping to pins

4 Clocks

4.1 HSE oscillator clock

Covers High-Speed External oscillator clock options: bypass and crystal.

4.2 LSE oscillator clock

Describes Low-Speed External oscillator clock options: bypass and crystal.

4.3 Clock security system (CSS)

Explains the clock security system for detecting HSE and LSE clock failures.

5 Boot configuration

5.1 Boot mode selection

Details how to select boot modes using BOOT pin and option bytes.

5.2 Boot pin connection

Explains the external connection required for boot mode selection.

5.3 System bootloader mode

Describes the system bootloader and its communication peripherals.

6 Debug management

6.1 Introduction

Introduces the host/target interface and its components for debugging.

6.2 SWJ debug port (serial wire and JTAG)

Details the Serial Wire/JTAG Debug Port (SWJ-DP) and its interfaces.

6.3 Pinout and debug port pins

Discusses pin configurations related to debugging and debug ports.

7 Recommendations

7.1 Printed circuit board

Guidelines for PCB layout, layers, and grounding.

7.2 Component position

Recommendations for component placement to reduce EMI and cross-coupling.

7.3 Ground and power supply (VSS,VDD)

Best practices for ground and power supply routing and loop minimization.

7.4 Decoupling

Explains decoupling capacitor placement, types, and impedance considerations.

7.5 Other signals

Tips for managing other signals like noisy and sensitive signals for EMC.

7.6 Unused I/Os and features

Strategies for handling unused MCU resources to improve EMC performance.

8 Reference design

8.1 Reference design description

Describes the core components, clock sources, reset, boot mode, SWJ, and power supply of the reference design.

8.2 Component references

Lists mandatory and optional components used in the reference design.

9 Recommended PCB routing guidelines for STM32H74xl/G and STM32H75xl/G devices

9.1 PCB stack-up

Details different PCB layer stack-up configurations for impedance matching and EMC.

9.2 Crystal oscillator

Offers guidance on layout and routing of crystal oscillator circuits.

9.3 Power supply decoupling

Explains power supply decoupling best practices to prevent noise.

9.4 High speed signal layout

Guides on layout for high-speed signal integrity, including SDMMC, FMC, QUADSPI, ETM.

10 Conclusion

11 Revision history