AN4938 Rev 4 43/46
AN4938 Recommended PCB routing guidelines for STM32H74xI/G and STM32H75xI/G devices
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• Avoid using a serpentine routing for the clock signal and as less via(s) as possible for
the whole path. a via alters the impedance and adds a reflection to the signal.
9.4.4 Embedded trace macrocell (ETM)
Interface connectivity
The ETM enables the reconstruction of the program execution. The data are traced using
the data watchpoint and trace (DWT) component or the instruction trace macrocell (ITM)
whereas instructions are traced using the embedded trace macrocell (ETM). The ETM
interface is synchronous with the data bus of 4 lines D[0:3] and the clock signal CLK.
Interface signals layout guidelines
• Reference the plane using GND or PWR (if PWR, add 10nf stitching cap between PWR
and GND
• Trace the impedance: 50 Ω ± 10%
• All the data trace should be as short as possible (<=25 mm),
• Trace the lines which should run on the same layer with a solid ground plane
un
derneath it without a via.
• Trace the clock which should have only point-
to-point connection. Any stubs should be
avoided.
• It is strongly recommended also for other (data) lines to be point-to-point only. If any
st
ubs are needed, they should be as short as possible. If longer are required, there
should be a possibility to optionally disconnect them (e.g. by jumpers).
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