Power supplies AN4938
10/48 DocID029918 Rev 1
1.1.3 Battery backup domain
Backup domain description
To retain the content of the RTC backup registers, backup SRAM, and supply the RTC when
V
DD
is turned off, V
BAT
pin can be connected to an optional 1.2-3.6 V standby voltage
supplied by a battery. Otherwise, V
BAT
must be connected to another source, such as V
DD
.
When the backup domain is supplied by V
BAT
(analog switch connected to V
BAT
since V
DD
is not present), the following functions are available:
• PC14 and PC15 can be used as LSE pins only.
• PC13 can be used as tamper pin (TAMP1).
• PI8 can be used as tamper pin (TAMP2).
• PC1 can be used as tamper pin (TAMP3).
During t
RSTTEMPO
(temporization at V
DD
startup) or after a power-down reset (PDR) is
detected, the power switch between V
BAT
and V
DD
remains connected to V
BAT
.
During the startup phase, if V
DD
is established in less than t
RSTTEMPO
and it is higher than
V
BAT
+ 0.6 V, a current may be injected into V
BAT
pin through an internal diode connected
between V
DD
and the power switch (V
BAT
). If the power supply/battery connected to the
V
BAT
pin cannot support this current injection, it is strongly recommended to connect an
external low-drop diode between this power supply and the V
BAT
pin.
Refer to the device datasheets for the actual value of t
RSTTEMPO
.
Battery charging
When V
DD
is present, the external battery connected to V
BAT
can be charged through an
internal resistance. This operation can be performed either through an internal 5
kΩ or
1.5
kΩ resistor. The resistor value can be configured by software.
Battery charging is automatically disabled in V
BAT
mode.
1.1.4 LDO voltage regulator
The LDO voltage regulator is always enabled after reset with a default output level set to
1.0
V (VOS3). The LDO can operate in three different modes depending on the application
operating modes:
• In Run mode, the regulator supplies full power to the core and the digital domain.
• In Stop mode, the regulator supplies low power to the core and to the digital domain,
thus preserving the contents of the registers and SRAM.
• In Standby mode, the regulator is powered down. The contents of the registers and
SRAM are lost except for those related to the standby circuitry and the backup domain.
In Run and Stop mode, the LDO voltage regulator can be dynamical scaled by software to
different voltage levels: VOS1, VOS2, and VOS3, SVOS3, SVOS4 or SVOS5.
The LDO regulator requires a capacitor on VCAP pins.
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