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Supermicro H11DSi - Page 64

Supermicro H11DSi
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H11DSi / H11DSi-NT User's Manual
64
L1 Data Cache (Size/Method)
L2 Data Cache (Size/Method)
L3 Cache per Scoket (Size/Method)
NB Conguration
Determinism Slider
Use this setting to congure the Determinism Slider. Options include Auto, Power and
Performance.
cTDP Control
Use this setting to congure the cTDP Control. Options include Manual and Auto.
IOMMU
Use this setting to enable/disable IOMMU. Options include Enabled, Disabled and Auto.
ACS Enable
Use this setting to enable/disable ACS. Options include Enabled, Disabled and Auto.
Memory Conguration
Memory Clock
This setting allows you to select different memory clock speed. Options include Auto and
speed settings from 1333Mhz to 2666Mhz.
Memory Interleaving
This setting controls fabric level memory interleaving. Note that the channel, die and socket
have requirements on memory populations and it will be ignored if the memory doesn't
support the selected option. Options include None, Channel, Die, Socket and Auto.
Memory Interleaving Size
This setting controls the memory interleaving size. This determines the starting address of
the interleave (bit 8, 9, 10 or 11). Options include 256 Bytes, 512 Bytes, 1 KB, 2 KB or Auto.
Chipset Interleaving
This setting controls interleave memory blocks across the DRAM chip for node 0. The
options are Disabled and Auto.
BankGroupSwap
This setting controls the Bank Group Swap. The options are Enabled, Disabled and Auto.

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