Supermicro H11DSi - Page 99

Chapter 5: BIOS (EPYC 7002 Series)
99
• Processor Family
• Processor Model
• Microcode Patch Level
• L1 Instruction Cache (Size/Method)
• L1 Data Cache (Size/Method)
• L2 Cache (Size/Method)
• L3 Cache per Scoket (Size/Method)
CPU2 Information
These sections are for informational purposes. They will display some details about the
detected CPUs on the motherboard, such as:
• CPU Version
• Number of Cores Running
• Clock speed
• Processor Family
• Processor Model
• Microcode Patch Level
• L1 Instruction Cache (Size/Method)
• L1 Data Cache (Size/Method)
• L2 Cache (Size/Method)
• L3 Cache per Scoket (Size/Method)
NB Conguration
Determinism Control
Use this setting to congure the Determinism Slider. Options include Auto, Power and
Performance.
cTDP Control
Use this setting to congure the cTDP Control. Options include Manual and Auto.