Supermicro X10DRG-O+-CPU - Page 13

Chapter 1: Overview
1-5
DESIGNED IN USA
REV:1.00
X10DRG-O-PCIE
JP1
JP2
LED10
LED11
LED14
LED15
LED18
LED19
LED2
LED3
LED4
LED6
LED7
LED1
FAN21FAN22
FAN23FAN24FAN25
L3
L5
JCPLD
JP3
JP4
J31
J32
J33 J34
CUT OFF
SLOT 10
SLOT 9
SLOT 11
SLOT 8
SLOT 12
Root Port
SLOT 3
SLOT 2
SLOT 4
SLOT 1
SLOT 5
Root Port
CPU2
SLOT6 PCI-E 3.0 X16
CPU1 SLOT12 PCI-E 3.0 X16
CPU1 SLOT11 PCI-E 3.0 X16
CPU1 SLOT10 PCI-E 3.0 X16
CPU1 SLOT9 PCI-E 3.0 X16
CPU1 SLOT8 PCI-E 3.0 X16
CPU1 SLOT7 PCI-E 3.0 X8 (IN X16)
CPU1 SLOT5 PCI-E 3.0 X16
CPU1 SLOT4 PCI-E 3.0 X16
CPU1 SLOT3 PCI-E 3.0 X16 CPU1 SLOT2 PCI-E 3.0 X16
CPU1 SLOT1 PCI-E 3.0 X16
JPCIE8
JPCIE11
JPCIE10
JPCIE9
JPCIE7
JPCIE6 JPCIE12
JPCIE2
JPCIE4
JPCIE5
JPCIE3
JPCIE1
X10DRG-O-PCIE Card Layout
Note: Jumpers/LED Indicators not indicated are for testing only.