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Supermicro X10DRG-O+-CPU - Page 83

Supermicro X10DRG-O+-CPU
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Chapter 4: AMI BIOS
4-13
Socket 1 PCIED00F0 - Port 0/DMI / Port 1A / Port 2A /
Port 3A
PCI-E Port
Select Enable to enable a PCI-E port speci ed by the user. Select Disable to
de-activate a PCI-E port speci ed by the user. Select Auto for the BIOS ROM
to automatically discard a PCI-E port speci ed by the user when there is no
HP-compatible device connected to this port or when there is no error detected
in this port. The options are Auto, Enable, and Disable.
Hot Plug Capable
Use this feature to enable or disable hot-plug support for a port speci ed by the
user. The options are Disable and Enable.
PCI-E Port Link
Use this feature to disable the physical link connected to a PCI-E port speci ed
by a user so that no training will take place on the component-level while the
PCI-E con guration commands are still in full force. The options are Enable
and Disable.
Link Speed
Use this item to con gure the link speed of a PCI-E port speci ed by the user.
The options are Auto, Gen 1 (Generation 1) (2.5 GT/s), and Gen 2 (Generation
2) (5 GT/s).
PCI-E Port DeEmphasis
This item con gures the De-Emphasis Control (LANKCON2 [6]) setting for this
computer. The options are -6.0 dB and -3.5 dB.
The following items will display:
PCI-E Port Link Status
PCI-E Port Link Max
PCI-E Port Link Speed
PCI-E Port L0s Exit Latency
Use this feature to set the length of time required for the port speci ed by the
user to complete the transition from L0s to L0. The default setting is 4uS - 8uS.
PCI-E Port L1 Exit Latency
Use this feature to set the length of time required for the port speci ed by the
user to complete the transition from L1 to L0. The default setting is <1uS, 1uS -
2uS, 2uS - 4uS, 4uS - 8uS, 8uS - 16uS, 16uS - 32uS, 32uS - 64uS, and >64uS.
Fatal Err (Error) Over
Select Enable to force fatal error propagation to the II0 core error logic for the
port speci ed by the user. The options are Disable and Enable.

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