Supermicro X10DRL-CT - Power SMB (I 2 C) Connector; Ipmb

Chapter 2: Installation
2-29
SAN MAC
BIOS LICENSE
SAS CODE
MAC CODE
IPMI CODE
BAR CODE
UID
LEDPWR
LEDBMC
JUSBRJ45
FAN6
FAN5
FAN1
FANB
FAN2
FAN3
FAN4
FANA
JIPMB1
JNVI2C1
JVRM2
JPTG1
1
JPB1
3
JPF1
JPF2
JPG1
JBR1
JPME2
JI2C1
JI2C2
JPS1
JPL2
JPL1
JVRM1
JWD1
J24
1
13
1224
1
J7J5
JS18
JF1
JPWR2
JPWR1
1
JL1
J21
JPI2C1
24
JPS7
SP1
BT1
+
JLAN3
JUIDB1
JSD1
JS1
JSTBY1
I-SGPIO1
I-SGPIO2
J25
JTPM1
JVGA
JLAN1
JBT1
I2C BUS FOR PCI-E SLOT
1-2:ENABLE
2-3:DISABLE
X10DRL-CT
DESIGNED IN USA
REV:1.00
CHASSIS INTRUSION
JL1
2-3:DISABLE
1-2:ENABLE
JI2C1/JI2C2
1-2:NORMAL
2-3:BIOS RECOVERY
JBR1
2-3:ME MANUFACTURING MODE
JPME2
1-2:NORMAL
1-2 ENABLE
JPL2 LAN
2-3 DISABLE
JPL1/
JPI2C1:PWR I2C
JPG1:VGA
JPB1:BMC
2-3 DISABLE
1-2 ENABLE
2-3 DISABLE
1-2 ENABLE
JPTG1:10Gb LAN
2-3 DISABLE
1-2 ENABLE
JPS1:SAS
L-SAS0-3
L-SAS4-7
USB8/9(3.0)
PCI-E 3.0 X8
LAN4
LAN3
LAN1
USB12/13(3.0)
I-SATA0
I-SATA1
I-SATA2
I-SATA3
USB2/3
USB4
JTPM1:TPM/PORT80
CHASSIS INTRUSION
I-SATA4
CMOS CLEAR
I-SATA5
CPU2 SLOT4
SPEAKER-PIN 4-7
JD1:
PWR LED-PIN 1-3
2-3:NMI
JWD1:WATCH DOG
1-2:RST
CPU1 SLOT5 PCI-E 3.0 X16
CPU1 SLOT6 PCI-E 3.0 X8
RSTPWR
ON
JF1
P1-DIMMD1
P1-DIMMC1
X NICOH/
2FF
HDDNIC
LED1
PWR
LED
NMIX
P2-DIMMF1
P2-DIMME1
CPU2
VGA
CPU1
P1-DIMMB1
P1-DIMMA1
P2-DIMMH1
P2-DIMMG1
COM1
IPMI_LAN
LAN2
JD1
A
A. JPI
2
C1
B. JIPMB1
Power SMB (I
2
C) Connector
Power System Management Bus (I
2
C)
Connector (JPI
2
C1) monitors power
supply, fan and system temperatures.
See the table on the right for pin
denitions.
PWR SMB
Pin Denitions
Pin# Denition
1 Clock
2 Data
3 PMBUS_Alert
4 Ground
5 +3.3V
IPMB
A System Management Bus header
for IPMI 2.0 is located at JIPMB1.
Connect the appropriate cable here
to use the IPMB I
2
C connection on
your system.
IPMB Header
Pin Denitions
Pin# Denition
1 Data
2 Ground
3 Clock
4 No Connection
B