Supermicro X11DPU - Page 38

38
Super X11DPU User's Manual
(DDR4 Only) Socket Level Population Requirements
DDR4 Socket Level Minimum Population Requirements
• There should be at least one DDR4 DIMM per socket.
• If only one DIMM is populated in a channel, then populate it in the slot furthest away from CPU.
• Always populate DIMMs with a higher electrical loading in DIMM0 followed by DIMM1.
(DDR4 Only) Memory Populations with Possible Mixes
DDR4 RDIMM DIMM0/DIMM1
Cong. Set A
DIMM0/DIMM1
Cong. Set B
DIMM0/DIMM1 Con-
g. Set C
Possible Mixes
DIMM0/DIMM1
Within
IMC
DIMM
Popula-
tion
DDR0 x8, None, x8, x8 x4, None, x4, x4 x8, x4, or x4, x8 Single Rank, None
Single Rank, Single Rank
Dual Rank, Single Rank,
Dual Rank, None
Dual Rank, Dual Rank,
Single Rank, Single Rank
DDR1 None or same as
DDR0
None or same as
DDR0
None or same as
DDR0
DDR2 None or same as
DDR1 (excludes
DIMM 1 in 5DIMM
congurations)
None or same as
DDR1 (excludes
DIMM 1 in 5DIMM
congurations)
None or same as
DDR1 (excludes DIMM
1 in 5DIMM congura-
tions)
(DDR4 Only) Memory Populations with Possible Mixes
3DS LRDIMM or 3DS RDIMM DIMM0/DIMM1 Cong. Set A Possible Mixes
DIMM0/DIMM1
Within IMC
DIMM Popu-
lation
DDR0 x4, None, x4, x4 Quad Rank, None
Quad Rank, Quad Rank
Cannot mix 3DS LRDIMM and RDIMM
DDR1 None or same as DDR0
DDR2 None or same as DDR1
(DDR4 Only) Memory Populations with Possible Mixes
LRDIMMs DIMM0/DIMM1 Possible Mixes
DIMM0/DIMM1
Within IMC
DIMM Popu-
lation
DDR0 x4, None, x4, x4 Quad Rank, None
Quad Rank, Quad Rank
Note: Requirements
*Match DIMM types installed across DDR
channels within an IMC
*Always populate iMC0 rst
DDR1 None or same as DDR0
DDR2 None or same as DDR1
(DDR4 Only) 2SPC Memory Conguration with x8 DIMMs
Total # of
DIMMs
DDR Channel Number
of Ranks
Virtual
Lock Step
DIMM Population
within an IMC
(Note: Uniformly
populate with x8
DRAMs DIMMs)
1 x8 DIMM Must be installed on iMC0 DDR Channel 0 1 N/A
>1 SVLS
2 x8 DIMMs DDR0: Populate with 1 DIMM
DDR1: Populate identically as DDR0
1 N/A
>1 SVLS
3 x8 DIMMs DDR0: Populate with 1 DIMM
DDR1: Populate identically as DDR0
DDR2: Populate identically as DDR1
1 N/A
>1 SVLS
4 x8 DIMMs DDR0: Populate with 2 DIMMs
DDR1: Populate identically as DDR0
x SVLS
5 x8 DIMMs DDR Channel 0, 1, 2: DIMM0 is populated with identi-
cal DIMMs,
DDR Channel 0, 1: DIMM1 is populated with identical
DIMMs
>1 SVLS
6 x8 DIMMs Populate 2 DIMMs per DDR channel x SVLS
DIMM Population
within an IMC
(Note: Non-equal
in rank pair of x8
DIMMs)
1 pair of
DIMMs
DDR0: Populate with 1 DIMM
DDR1: Populate the second DIMM (for best perfor-
mance)
1 N/A
>1 SVLS
2 pairs of
DIMMs
DDR0: Populate with 1 pair of non-equal rank DIMMs
DDR1: Populate identically as DDR0
1 N/A
>1 SVLS
3 pairs of
DIMMs
DDR0: Populate with 1 pair of non-equal rank DIMMs
DDR1: Populate identically as DDR0
DDR2: Populate identically as DDR1
x SVLS
2 pairs+1
(5DIMMs)
DDR0: Populate with 1 pair of non-equal rank DIMMs
DDR1: Populate with identical DIMMs as DDR0
DDR2: DIMM0 is populated with identical DIMM as
DDR1
>1 SVLS