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Supermicro X12SPZ-SPLN6F - Page 77

Supermicro X12SPZ-SPLN6F
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Chapter 4: BIOS
77
CPU Conguration
The following CPU information will display:
Processor BSP Revision
Processor Socket
Processor ID
Processor Frequency
Processor Max Ratio
Processor Min Ratio
Microcode Revision
L1 Cache RAM (Per Core)
L2 Cache RAM (Per Core)
L3 Cache RAM (Per Package)
Processor 0 Version
CPU1 Core Disable Bitmap
CPU1 Core Disable Bitmap
Core Disable Bitmap(Hex)
Select 0 to enable all cores or FFFFFFFFFFF to disable all cores. One core must be
enabled.
Hyper-Threading (ALL)
Select Enable to support Intel Hyper-threading Technology to enhance CPU performance.
The options are Disable and Enable.
Hardware Prefetcher
If set to Enable, the hardware prefetcher will prefetch streams of data and instructions from
the main memory to the L2 cache to improve CPU performance. The options are Disable
and Enable.

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