Tait TB7100 - Page 27

TB7100 Service Manual Functional Description 27
© Tait Electronics Limited October 2005
In the system employed in the transmitter board, the frequency reference is
generated by the FCL, which itself requires dual-point modulation injection
to allow modulation down to DC. With another modulation point required
in the RF PLL, this system therefore requires triple-point modulation. The
modulation signals applied to the FCL are in digital form, whereas for the
RF PLL (VCO) the modulation signal is applied in analog form. The
modulation cross-over points occur at approximately 30 and 300Hz as
determined by the closed loop bandwidths of the FCL and RF PLL
respectively.
Frequency
Generation
The RF PLL has a frequency resolution of 25kHz. Higher resolution cannot
be achieved owing to acquisition-time requirements and so for any given
frequency the error could be as high as ±12.5kHz. This error is corrected
by altering the reference frequency to the RF PLL. The FCL supplies the
reference frequency and is able to adjust it up to ±300ppm with better than
0.1 ppm resolution (equivalent to better than 50Hz resolution at the RF
frequency).
Fast Frequency
Settling
Both the FCL and RF PLL employ frequency-acquisition speed-up
techniques to achieve fast frequency settling. The frequency-acquisition
process of the FCL and RF PLL is able to occur concurrently with minimal
loop interaction owing to the very large difference in frequency step size
between the loops.
Frequency
Acquisition
of RF PLL
In the RF PLL the loop bandwidth is initially set high by increasing the
charge pump current and reducing time constants in the loop filter. As a
result settling to within 1 kHz of the final value occurs in under 4ms. In
order to meet noise performance requirements the loop parameters are then
switched to reduce the loop bandwidth. There is a small frequency kick as
the loop bandwidth is reduced. Total settling time is under 4.5ms.
Frequency
Acquisition
of FCL
The FCL utilises self-calibration techniques that enable it to rapidly settle
close to the final value while the loop is open. The loop is then closed and
settling to the final value occurs with an associated reduction in noise.
The total settling time is typically less than 4 ms.
Calibration The following items are calibrated in the frequency synthesizer:
■ nominal frequency
■ KVCO
■ KVCXO
■ VCO deviation
Calibration of the nominal frequency is achieved by adding a fixed offset to
the FCL nominal frequency; the TCXO frequency itself is not adjusted.
The items KVCO and KVCXO are the control sensitivities of the RF VCO
(in MHz/V) and VCXO (in kHz/V) respectively. The latter has temperature
compensation.