Tait TB7100 Service Manual

TB7100 Service Manual Circuit Descriptions 61
© Tait Electronics Limited October 2005
Figure 4.8 Block diagram of the digital board
Trans-
mitter
DIGTX INH
DIG SYN EN
SYN LOCK
DIG SYNTR SW
DIG SYN FAST
DIG SYN LATCH
SYN DIG FREF
Fre-
quency
Synthe-
sizer
DIG SYN SPI DO
DIG SYN SPI CLK
DIG RX LE
RX DIG LD
DIG RX NB EN
Receiver
DIG RX EN
CDC2 DIG SDTO
DIG CDC2 SDTI
DIG CDC2 SCLK
DIG CDC2 LRCK
DIG DAC SPI DO
DIG DAC SPI CLK
DIG DAC LATCH
DIG CDCARSM
CDC DIGVSFS
CDC DIGVSDO
DIG CDCVSDI
CDC DIG BSOFS
CDC DIG BSDO
DIG CDCASFS
DIG CDCASDI
CDC DIGASDO
DIGAUD PA EN1
DIGAUD PA EN2
DIG SYS CLK
+1V8
CODEC
and
Audio
PSU SYS RST
DIG EE CS
EE DIG SPI DI
Serial
EEPROM
DGND
AGND
DIG CH SPI CLK
DIG CH SPI DO
ITF CH SPI DI
DIG CH LE
ITF CH GPI1
DIG CH GPO1
ITF CH PTT
ITF CH HOOK
ITF ON OFF
ITF IOP GPIO1-7
DIG IOPTXD
ITF IOP RXD
ITFAUX GPI1-7
DIGAUX GPO4-7
DIGAUXTXD
ITFAUX RXD
DIG CHTXD
ITF CH RXD
DIG PSU LATCH
DIGWD KICK
DIGTX EN
+3V3
DIG RX EN
PSU SYS RST
Interface
Power
Supply
FPGA
RAM
CONTROL
ADDRESS
DATA
Flash
Memory
ITF CH RXD
DIG CHTXD
PSU SYS RST
DSP and
Address
Decoder
McBSP0 (x4)
McBSP1 (x4)
BIRDIE
FPGA CLK
System
Clock
1V8
Regulator
1V5
Regulator
+1V8
+1V5
AGND
+3V3
Factory Connector
FPGA JTAG Signals:
DSP JTAG Signals:
FPGA JTAG TCK
FPGA JTAG TMS
FPGA JTAG TDO
JTAG FPGA TDI
DSP JTAG TCK
DSP JTAG TMS
DSP JTAG TDO
JTAG DSP TDI
DSP JTAG TRST
DSP JTAG EMU0
DSP JTAG EMU1
DSP JTAG (x7)
FPGA JTAG (x4)
Digital Board
DIG SLP ENDIG CDC RST
Signal Types:
RF
analog
clock
digital
asynchronous serial data
synchronous serial data

Tait TB7100 Specifications

General

Brand	Tait
Model	TB7100
Category	Accessories
Language	English