Technics SL-P202A - Digital Signal Processing

e 1C301 (MN6625): Digital signal processing
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Division
Serial data byte clock
P| ey Pes aod win open}
Crystal frame clock
Ea om ae et ued open)
De-emphasis ON signal
(de-emphasis ON at ‘‘H”)
(Not used, open)
za SRDATA [eee 3H Serial data output (MSB first)
| 5 SCK Serial bit clock output
LRCK hoe LR discrimination clock (88.2kHz)
7 DCK Serial data output word clock
(Not used, open)
L channel deglitch signal
a LOG (Not used, open)
R channel deglitch signal
(Not used, open)
0 IPFLAG
Interpolation flag
Division
Tr Psonraae
Tracking servo ON signal
(tracking servo ON at “L’’)
STAT 8 Status command for CRC etc
= i=) >
on |
>
27
TRON
Sub-code serial output data
(Not used, open)
(Not used, open)
Turntable motor FG signal input
(Not used, open)
30 SUBC
=] = = a m
31 SBCK
32 SMCK
oO oe < =] o
(interpolation at ‘H”’)
(Not used, open)
Error flag terminal
(Not used, open)
Clock (16.9344 MHz) output
(Not used, open)
Test mode selection
(Not used, connected to +5V)
Digital age! output
(Not used, open)
Mode selector
(“L"':normal, “H'’:SLEEP mode)
(Not used, connected to GND)
Test terminal (‘‘L’’: normal)
(Not used, connected to GND)
Clock input (16.9344 MHz)
x2 Clock output (16.9344 MHz)
(Not used, open)
3
Turntable motor ON command
(ON at “L”)
Turntable motor drive signal
Resynchronizing signal
(Not used, open)
Drop-out detection signal
(Drop-out at ‘’H’’)
Sliced RF signal
Modulation data
PLL extract clock (4.2336MHz)
PLL frequency comparision signal
16K RAM data input/output
RAM OE Read out enable
16K RAM address signal
(RAMAO: LSB, RAMA10: MSB)
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m (o)
RESY
oO
4
m o 4
vU i?) zx
n m
BS zu]
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GND terminal
Sub-code Q data block
clock (75 Hz)
Sub-code frame clock (7.35kHz)
Sub-code Q data
Load command for mode control
data
fe
(2) c i=] o xz
a|| 2 2!) o
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SPAS