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Technics SL-P202A - Block Diagram

Technics SL-P202A
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=
BLOCK
DIAGRAM
e
1©501
(AN8371S):
Data
slice
and
PLL
wo
OPTICAL
PICKUP
UNIT
SERVO
CIRCUIT
MAIN
CIRCUIT
Division
PLL
loop
filter
connection
PLL
frequency
comparison
signal
ne
!
|
+5Vv
SV
Power
supply
(connected
to
—5V)
Sliced
RF
signal
HEin/Olw04
ese
a
ee
a
>
AN837!
Modulation
data
8
Foneectr
1
RF
signal
output
with
AGC
output
r
soe
DIODE
GND
terminal
(digital
system
IGNAL
PROCESSOR
cig
i
)
ARF
signal
input
for
AGF
drop-out
-
PLL
extract
clock
(4.2336MHz)
detection
input
Fes
-
si/
FOCUS
FElog
Rel
Re2
TL
PLLH
RD
t
Power
supply
(connected
to
+5V)
Loop
filter
for
AGC
connected
qase6o
Drop-out
detection
signal
GND
terminal
(analog
system)
RF
signal
input
for
data
slicing
VCO
free
run
frequency
adjusting
current
input
(Not
used,
open)
Capacitor
connection
for
VCO
oscillator
frequency
Nass
MOTOR
FOCUS
DRIVE
is
!
4
Be
+
:
Slicing
level
control
signal
input
1C404
10
Resistor
connection
for
VCO
(Not
used,
connected
to
GND)
LRADIAE
MOTOR:
!
RADIAL
DRIVE
Lic
404]
oscillator
frequency
:
i
TRACK
LOSS
DET.
Filter
capacitor
for
data
slicer
_
Capacitor
connection
for
PLL
DO
connected
|
protection
LASER
DIODE
|
|
Filter
capacitor
for
data
slicer
connected
LS)
PLL
loop
filter
connection
< <
<
</|v
m
D
9)
>
190/90
a
-
O|AzA
=
LS)
sina.
TL
HFD
—-
Si/_
-DODS
STAT
TRO
RO
LASER
POWER
ADJ.
VR3520
TDAB809T
Ae
Ere
oe
RADIAL
ERROR
SIGNAL
:
a
PROCESSOR
BO~3
ove
RE
dig/X!
TRAYSW_POL
HF
/DI~D4
¢1C801
(MN6471):
Digital
filter
and
D/A
converter
Command
load
input
(load:
L)
SKATE
P60
SPO~3
0
vo
'
Division
ma
|
Division
TRAY
SW
|
oe
.
=
|
|
_
22
|
AVDD1
kote
3)
Power
supply
(connected
to
+4.7V)
STB
DVDD1
Power
supply
(connected
to
+4.3V)
|
SKATE
DIVG
ox
Lex}
MNISSIPJF
-1
PERIOD
DET
&
SPEED
CONTROL
DVSS1
Not
used,
connected
to
GND
TEST
terminal
GND
terminal
(digital
system)
Clock
output
POWER
SUPPLY
CIRCUIT
WEE
,0351.353
es
bem
£4)
,
01
1~16,891,892
TURNTABLE
a}/a]lal/a4a
aay
Ae
el
ak
0
x
Ls)
!
ea
|
|
Ea
Eas
|
ch
p=
+12V
ee
EST1
ee
TEST
terminal
1
(connected
to
GND)
27
Connected
to
GND
|~+
av
H
!
AC
POWER
POWER
“Ey
EST2
nae
TEST
terminal
2
(connected
to
GND)
DVDD2
Power
supply
(connected
to
+4.3V)
1N
TRANSFORMER
|
cuppLy
L.
+5V
Sub-strate
terminal
aca
H
RESET
SIGNAL
ub-str
rminal
i
Pearcy
nnn
|
10
favoos
[1
|
Power
supply
(connected
to
+4.7V)
ZFLGB
ra
Man
pea
taeninal
a1
|
OUTL
(-)
ka
Lch
data
output,
(—)
terminal
|
s2
|e
|
oo
|
192
fS(8.4672MHz2)
ee
ee
ee
ee
ee
[12
[avess
[1
_|
eno
termina
fea
[umpo
|
1
|
connestedto
sa
avy
AVSS3
Lee
I
GND
‘terminal
|
4
|
LRCLK
ma
LR
discrimination
signal
input
BO-B3
:
Control
bits
for
radial
circuit.
RE
dig
:
Radial
error
digital.
MCLK
DAC
:
Current
output
for
track
jumping.
RE
lag
:
Radial
error
signal
for
LAG
network
SUBQ
OUTL
(+)
|
oo
|
Lech
data
output,
(+)
terminal
BCLK
aie
|
Serial
bit
clock
input
(Digital
to
Analogue
Converted)
RPU
:
Radial
puls
after
track
jumping.
CLDCK
:
DODS
:
Drop
out
detector
supression.
Si/RD
:
On/off
control
for
laser
supply
and
BLKCK
|
15
|
avons
|
1
|
Power
supply
(connected
to
+4,7V)
SRDATA
ie
oa
Serial
data
input
(MSB
first)
D1-D4
=:
Photodiode
currents.
Jo
focus
circuit.
RST
FE
:
Focus
error
signal.
TL
:
Track
loss
signal.
TRON
pw
[nc
|
[Notconnectea
=|
|
s7
|ovsss
|
1
|
GND
terminal
(digital
system)
FE
lag
:
Focus
error
signal
for
LAG
network.
Div4
:
Radial
error
digital
devided
by
four.
EC
HF
:
HF
output
for
DEMOD.
RF
:
Data
PC
|
17
|avooe
|
1
|
Power
supply
(connected
to
+4.7V)
DVDD
a
Power
supply
(connected
to
+4.3V)
HFD
:
HF
detector
output
for
DEMOD.
DO
:
Drop-out
detection
signal
(Active
High)
SMCK
HF-in
:
HF
current
input.
SRF
:
Sliced
RF
signal.
OE
OUTR
(+)
a
Rch
data
output,
(+)
terminal
|
so
[sets
|
oo
|
384
fs
(16.9344MHz)
output
LM
:
Laser
monitor
diode
input.
EFM
:
Modulation
data.
WE
;
Power.down
terminal
LO
:
Laser
amplifier
current
output.
PCK
:
PLL
extract
clock
(4.2336MHz)
LRCK
|
19
|
ANGUS.
ee
|
GND
terminal
(analog
system)
Fao
feo
=f
|
(Not
used,
connected
to
GND)
RE
:
Radial
error
signal
(amplified
RE2
FPC
:
PLL
frequency
comparison
signal
SRDATA
;
-RE1
currents).
STAT
:
Status
command
for
CRC
etc.
SCK
AVSS1
GND
t
|
I
a
OUTR
(-)
fer
wil
Rch
data
output,
(-)
terminal
|
2
|
MCLK
is
wie
4
Data
clock
for
MDATA
eu
la
tied
currents
03-end
Dt:
doar
aig
aceon
RE2
:
Radial
error
signal
2
(summation
of
MLD
:
Load
command
for
mode
control
data
amplified
currents
D1
and
D2).
(Active
Low)
es
by
18

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