Technics SL-PS740A - (Not Used, Connected to VDD); Not Used, Connected to GND; TEST Terminal

* 1C301 (MN6626): Digital signal processor
Function
Sieiee
AVSS GND terminal
IREF ied Reference current input
| RF signal input
| ARF
r= fee —|f
fe used, open)
BSF [vo [ost op iterteminal |
ae
| RE signal polarity setting
RSEL terminal
eee
TBUSO
(Not used, connected to VDD)
FLAG oO | Flag terminal
IPFLAG ie) | Interpolation flag terminal
Crystal frame clock
FOLK 0 ; (Not used, open)
BYTCK | Byte clock (Not used, open)
WDCK | Word clock (Not used, open)
| Reset terminal
Digital audio signal
(Not used, open)
Lch deglitch signal
(Not used, open)
Rch deglitch signal
(Not used, open)
SRDATA | Serial data output (MSB first)
vf see | Serial bit clock output
LRCK | L/R discriminating signal
ice Crystal OSC terminal
PMCK
(f= 16.9344 MHz)
(Not used, open)
PSEL
u/|90 -—| Oo rir
nym
Oo Test terminal
N
18
Frequency division clock signal
(Not ee open)
(t=55 x CK=88.2kHz)
Q n
m r
Test terminal
(Connected to GND)
| (t= 16.9344 MHz)
| GND terminal
SUBQ er Sub-code Q data
SQCK Sub-code Q register clock
DCK
CL Sub-code frame clock
(f=7.35 kHz) (Not used, open)
| SL-PS740A
Function
sitsian
Oe Sub-code block clock (f=75Hz)
De-emphasis ON signal
(“H": ON)
Emphasis signal
Command load signal
(“L”: LOAD)
Command clock signal
Command data signal
Muting input (‘‘H”: MUTE)
System clock (f =4.2336 MHz)
Status signal
(CRC, CUE, CLVS, TTSTOP,
FCLV, SQOK)
Sub-code CRC check terminal
(“H": OK, “L”: NG)
SUBC Sub-code seria! output data
(Not used, open)
Sub-code serial output clock
(Not used, open)
Tracking servo ON signal
(“L”: ON)
Turntable servo phase synchro
(“H": CLV, “L’': Rough servo)
Turntable motor ON signal
(“L": ON)
CLVS
Turntable motor drive signa!
(Forced mode)
Turntable motor drive signal
(Servo error signal)
Power supply terminal
Test terminal (Normal: “H”)
pt
cer
MSEL
“SUBQ” terminal mode select
(“H”: Q code buffer)
“SMCK” terminal frequency
select (“L”: SMCK = 4.2336 MHz)
Re-synchronizing signal of frame
sync. (Not used, open)
Drop-out detection signal
(“H": Drop-out)
(Not used, connected to GND)
oe | EFM signal (Not used, open)
PLL extract clock (f =4.3218 MHz)
(Not used, open)
Phase comparated signal of
EFM and PCK (Not used, open)
~31-