Tektronix 47E5A

I
I
I
I
I
I
I
I
I
ov
VI V
II II
V
~
'"
'0
I
0
I
POSITIVE LEVEL
(A) CHANNEL 1 SIGNAL
WITH 3 DIVISIONS OF
POSITIVE DC LEVEL.
.J
~
ov
"
NEGATIVE OFFSET
(8) CHANNEL 2 DISPLAY
WITH 3 DIVISIONS OF
NEGATIVE OFFSET .
Fig . 16. Algebraic addition.
"'
V
I
V
V
/ /
..
(C) RESULTANT DISPLAY
465 / 0M · O·19
COMMON-MODE REJECTION
EXAMPLE: The signal applied to the CH 1 input
contains unwanted line frequency components (see Fig.
17A).
To remove the undesired components use the
following procedure .
The ADD mode can be used to display signals that
contain undesirable components . These undesirable
components can be e liminated through common mode
rejection. The precautions given under algebraic addition
should be observed .
1. Connect a line fr eque ncy signal to the CH 2 input.
2. Set the VERT MODE switch to AL T and the CH 2
INVERT switch to on (button in ). Adjust the CH 2
@
475A1DM44 Operators
35