TELINK SEMICONDUCTOR TLSR8232 - Page 14

Telink TLSR8232 BLE SDK Developer Handbook
AN-19112700-E1 13 Ver.1.0.0
Figure 6-6 Firmware: Ending Part ............................................................................ 144
Figure 6-7 Master Sends “OTA start” ....................................................................... 144
Figure 6-8 Master OTA Data .................................................................................... 145
Figure 7-1 Row/Column Key Matrix ......................................................................... 149
Figure 7-2 Keycode Processing Function ................................................................ 154
Figure 7-3 Keyscan Time Optimization .................................................................... 159
Figure 10-1 PWM Cycle & Duty ............................................................................... 176
Figure 10-2 PWM interrupt ....................................................................................... 179
Figure 10-3 DMA FIFO Buffer for IR DMA FIFO Mode ............................................ 180
Figure 10-4 Demo IR protocol .................................................................................. 182
Figure 10-5 IR Timing 1 ............................................................................................ 183
Figure 10-6 IR Timing 2 ............................................................................................ 184
Figure 11-1 EMI Test Tool ........................................................................................ 193
Figure 11-2 Select Data Bus .................................................................................... 193
Figure 11-3 Swire synchronization operation ........................................................... 194
Figure 11-4 Set Channel .......................................................................................... 194
Figure 11-5 Select RF Mode .................................................................................... 195
Figure 11-6 Interface After RF Mode Setting ........................................................... 195
Figure 11-7 Select Test Mode .................................................................................. 196
Figure 11-8 Set TX Packet Number ......................................................................... 196
Figure 11-9 TX Mode Interface ................................................................................ 197
Figure 11-10 Read RX Packet Number and RSSI ................................................... 197
Figure 12-1 Module Hardware Connection .............................................................. 205
Figure 12-2 Scan Module Device ............................................................................. 206
Figure 12-3 Connect Module Device ........................................................................ 206
Figure 12-4 Module Sending Data ........................................................................... 207
Figure 12-5 Phone Receiving Data .......................................................................... 207
Figure 12-6 Phone Sending Data ............................................................................. 208
Figure 12-7 Module Receiving Data ......................................................................... 208
Figure 12-8 Connection of Hardware When Low Power is Enabled ....................... 209