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Texas Instruments BQ76942EVM User Manual

Texas Instruments BQ76942EVM
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DC Power Supply
+ -
Install cell
simulator shunts
Add shunts for pull-ups if pull-
ups not provided on MCU board
MCU
Evaluation Board
SDA
SCL
Figure 4-6. Host Connection Concept
4.8 Hardware Configuration
4.8.1 Configuration Jumpers
Certain features on the BQ76942EVM may be configured by jumpers or shunts on headers. See Section 5.4 for
details of the header pins. Not all configurations are compatible with all register settings, the user should set pins
appropriately for the register settings planned. For example pins must not be pulled above REG18 when used as
thermistor inputs. Pull up to REG1 is not acceptable when registers configure a pin as a thermistor input.
CAUTION
Multi-function pins must be connected to compatible signal levels before programming registers to
avoid device damage.
The cell simulator header and I2C configuration are discussed with board connection diagrams.
J5 and J8 select the connection of the DFETOFF and CFETOFF pins. Pins may be pulled low, or high to REG1.
J6 selects the connection of TS2. It may be taken to a terminal block for connection of an external wake or
thermistor. It may also be pulled to VSS. The 10k R23 simulates a nominal temperature.
J16 and J17 select the connection of ALERT. It may be connected to the on-board interface for HDQ or pulled up
to REG1.
4.8.2 Unused Components
The EVM contains a number of component patterns which may be useful for evaluation. Unpopulated headers at
the MCU may provide future signal access. Parallel FET configuration is possible by changing the component
population in the FET area. See the FET schematic in Figure 5-11.
www.ti.com
BQ76942 Circuit Module Use
SLUUC32A – NOVEMBER 2019 – REVISED OCTOBER 2020
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BQ76942 Evaluation Module 21
Copyright © 2020 Texas Instruments Incorporated

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Texas Instruments BQ76942EVM Specifications

General IconGeneral
BrandTexas Instruments
ModelBQ76942EVM
CategoryMotherboard
LanguageEnglish

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