Texas Instruments LMK04826 User Manual

1
SNAU145B–MAY 2013–Revised March 2018
Submit Documentation Feedback
Copyright © 2013–2018, Texas Instruments Incorporated
LMK04826 and LMK04828 User’s Guide
User's Guide
SNAU145B–MAY 2013–Revised March 2018
LMK04826 and LMK04828 User’s Guide
This user’s guide describes how to set up and operate the LMK04826/8 evaluation module (EVM). The
LMK04826/8 is the industry’s highest performance clock conditioner with JEDEC JESD204B support.
Contents
1 Evaluation Board Kit Contents ............................................................................................. 2
2 Quick Start.................................................................................................................... 3
3 PLL Loop Filters and Loop Parameters................................................................................... 9
4 Default TICS Pro Modes for the LMK0482x ............................................................................ 10
5 Using TICS Pro to Program the LMK0482x ............................................................................ 11
6 Evaluation Board Inputs and Outputs ................................................................................... 16
7 Recommended Test Equipment.......................................................................................... 19
Appendix A TICS Pro Usage ................................................................................................... 20
Appendix B Typical Phase Noise Performance Plots....................................................................... 29
Appendix C Schematics......................................................................................................... 39
Appendix D Bill of Materials .................................................................................................... 45
List of Figures
1 Quick Start Diagram......................................................................................................... 3
2 CLKout Page Description Diagram........................................................................................ 4
3 Continuous SYSREF Output ............................................................................................... 6
4 Pulsed SYSREF Output .................................................................................................... 7
5 Clock Outputs Page Setup for SYSREF Output on SDCLKout7...................................................... 8
6 Selecting a Default Mode for the LMK04828 Device.................................................................. 10
7 Selecting the LMK04828B ................................................................................................ 12
8 Loading the Device ........................................................................................................ 12
9 Setting the Default Mode for LMK04828 ................................................................................ 14
10 Setting Digital Delay, Clock Divider, Analog Delay and Output Format............................................. 15
11 TICS Pro - User Controls Page .......................................................................................... 21
12 TICS Pro - Raw Registers Page ......................................................................................... 22
13 TICS Pro - Set Modes Page .............................................................................................. 23
14 TICS Pro - CLKinX Control Page ........................................................................................ 24
15 TICS Pro - SYNC / SYSREF Page ...................................................................................... 25
16 TICS Pro - Clock Outputs Page.......................................................................................... 26
17 TICS Pro - Other Page .................................................................................................... 27
18 TICS Pro - Burst Page..................................................................................................... 28
19 Crystek CVHD-950-122.88 MHz VCXO Phase Noise at 122.88 MHz .............................................. 30
20 LMK04826 DCLKout2, VCO0, 245.76 MHz, Div8, LVPECL20 /w 240- Ω Emitter Resistor,
DCLKoutX_MUX=Divider, IDL=1, ODL=0, Balun = Prodyn BIB-100G.............................................. 31
21 LMK04826 DCLKout2, VCO0, 245.76 MHz, Div8, LVPECL20 /w 240- Ω Emitter Resistor,
DCLKoutX_MUX=Divider, IDL=1, ODL=0, Single Ended............................................................. 32
22 LMK04826 DCLKout2, VCO1, 245.76 MHz, Div10, LVPECL20 /w 240 ohm emitter resistor,
DCLKoutX_MUX=Divider, IDL=1, ODL=0, Balun = Prodyn BIB-100G.............................................. 33
23 LMK04826 DCLKout2, VCO1, 245.76 MHz, Div10 , LVPECL20 /w 240-Ω Emitter Resistor,
DCLKoutX_MUX=Divider, IDL=1, ODL=0, Single Ended............................................................. 34

Texas Instruments LMK04826 Specifications

General

Number of Outputs	14
Supply Voltage	3.3 V
Device Type	Clock Generator
Input Frequency	Up to 3.2 GHz
Output Frequency	Up to 3.2 GHz
Output Type	LVPECL, LVDS, CMOS
Operating Temperature	-40°C to +85°C

Summary

Quick Start Guide

Quick Start Description

Core setup procedure for EVM operation and initial testing.

CLKout Page Configuration

Detailed settings for clock outputs, including delay and divider.

SYSREF Quick Start Modes

Setup for Continuous and Pulsed SYSREF output modes.

PLL Loop Filters and Parameters

PLL1 Loop Filter Configuration

Details of the first PLL's loop filter components and parameters.

PLL2 Loop Filter Configuration

Details of the second PLL's loop filter components and parameters.

Using TICS Pro Software

Starting and Selecting Device

Initial software launch and selecting the target device.

Programming and Output Configuration

Loading registers and enabling clock outputs via TICS Pro.

Restoring Default Modes

Setting predefined configurations for reproducible results.

Evaluation Board Inputs and Outputs

Connector and Signal Descriptions

Details of board connectors, signal types, and terminations.

Recommended Test Equipment

Power Supply Requirements

Specifications for the low-noise power supply.

Phase Noise Measurement Equipment

Tools recommended for analyzing phase noise and jitter.

Appendix A TICS Pro Detailed Usage

TICS Pro Tips and Communication Setup

General software guidance and communication setup.

User Controls, Registers, and Modes

TICS Pro interface elements, register map, and device modes.

Clock Input, SYNC/SYSREF, and Outputs

Settings for clock inputs, synchronization, and output configurations.

Other and Burst Mode Features

GPIO control and sequence programming features.

Appendix B Phase Noise Performance Plots

VCXO Phase Noise Characterization

Performance plots of the reference VCXO.

Clock Output Phase Noise Measurements

Measured phase noise of various clock outputs.

Appendix C Schematics

Power Supply Schematics

Detailed power distribution circuits for the evaluation board.

LMK04828B Core Circuitry

Internal block diagram and connections of the LMK04828B.

Digital Signal and Clock Output Schematics

Circuitry for digital signals and clock signal routing.

Appendix D Bill of Materials

Evaluation Board Components List

Comprehensive list of components used on the evaluation boards.