Texas Instruments Jacinto 7 DRA829 - Page 18

Table 5-3. BUCK NVM Settings (continued)
Register Name Field Name
TPS65941213-Q1 TPS65941111-Q1
Value Description Value Description
BUCK3_CTRL BUCK3_EN 0x0 Disabled; BUCK3 regulator 0x0 Disabled; BUCK3 regulator
BUCK3_FPWM 0x0 PFM and PWM operation
(AUTO mode).
0x0 PFM and PWM operation
(AUTO mode).
BUCK3_FPWM_MP 0x0 Automatic phase adding and
shedding.
0x0 Automatic phase adding and
shedding.
BUCK3_VMON_EN 0x0 Disabled; OV, UV, SC and
ILIM comparators.
0x0 Disabled; OV, UV, SC and
ILIM comparators.
BUCK3_VSEL 0x0 BUCK3_VOUT_1 0x0 BUCK3_VOUT_1
BUCK3_PLDN 0x1 Enabled; Pull-down resistor 0x1 Enabled; Pull-down resistor
BUCK3_RV_SEL 0x0 Disabled 0x0 Disabled
BUCK3_CONF BUCK3_SLEW_RATE 0x5 1.3 mV/μs 0x2 10 mV/μs
BUCK3_ILIM 0x5 5.5 A 0x4 4.5 A
BUCK4_CTRL BUCK4_EN 0x0 Disabled; BUCK4 regulator 0x0 Disabled; BUCK4 regulator
BUCK4_FPWM 0x0 PFM and PWM operation
(AUTO mode).
0x0 PFM and PWM operation
(AUTO mode).
BUCK4_VMON_EN 0x0 Disabled; OV, UV, SC and
ILIM comparators.
0x0 Disabled; OV, UV, SC and
ILIM comparators.
BUCK4_VSEL 0x0 BUCK4_VOUT_1 0x0 BUCK4_VOUT_1
BUCK4_PLDN 0x1 Enabled; Pull-down resistor 0x1 Enabled; Pull-down resistor
BUCK4_RV_SEL 0x1 Enabled 0x0 Disabled
BUCK4_CONF BUCK4_SLEW_RATE 0x3 5.0 mV/μs 0x2 10 mV/μs
BUCK4_ILIM 0x5 5.5 A 0x4 4.5 A
BUCK5_CTRL BUCK5_EN 0x0 Disabled; BUCK5 regulator 0x0 Disabled; BUCK5 regulator
BUCK5_FPWM 0x0 PFM and PWM operation
(AUTO mode).
0x0 PFM and PWM operation
(AUTO mode).
BUCK5_VMON_EN 0x0 Disabled; OV, UV, SC and
ILIM comparators.
0x0 Disabled; OV, UV, SC and
ILIM comparators.
BUCK5_VSEL 0x0 BUCK5_VOUT_1 0x0 BUCK5_VOUT_1
BUCK5_PLDN 0x1 Enable Pull-down resistor 0x1 Enable Pull-down resistor
BUCK5_RV_SEL 0x1 Enabled 0x1 Enabled
BUCK5_CONF BUCK5_SLEW_RATE 0x3 5.0 mV/μs 0x3 5.0 mV/μs
BUCK5_ILIM 0x3 3.5 A 0x3 3.5 A
BUCK1_VOUT_1 BUCK1_VSET1 0x37 0.800 V 0x37 0.800 V
BUCK1_VOUT_2 BUCK1_VSET2 0x37 0.800 V 0x0 0.3 V
BUCK2_VOUT_1 BUCK2_VSET1 0x37 0.800 V 0x37 0.800 V
BUCK2_VOUT_2 BUCK2_VSET2 0x37 0.800 V 0x0 0.3 V
BUCK3_VOUT_1 BUCK3_VSET1 0xfd 3.30 V 0x0 0.3 V
BUCK3_VOUT_2 BUCK3_VSET2 0xfd 3.30 V 0x0 0.3 V
BUCK4_VOUT_1 BUCK4_VSET1 0x41 0.850 V 0x0 0.3 V
BUCK4_VOUT_2 BUCK4_VSET2 0x41 0.850 V 0x0 0.3 V
BUCK5_VOUT_1 BUCK5_VSET1 0xb2 1.80 V 0x41 0.850 V
BUCK5_VOUT_2 BUCK5_VSET2 0xb2 1.80 V 0x0 0.3 V
BUCK1_PG_WINDOW BUCK1_OV_THR 0x3 +5% / +50 mV 0x3 +5% / +50 mV
BUCK1_UV_THR 0x3 -5% / -50 mV 0x3 -5% / -50 mV
BUCK2_PG_WINDOW BUCK2_OV_THR 0x3 +5% / +50 mV 0x3 +5% / +50 mV
BUCK2_UV_THR 0x3 -5% / -50 mV 0x3 -5% / -50 mV
BUCK3_PG_WINDOW BUCK3_OV_THR 0x7 +10% / +100mV 0x0 +3% / +30mV
BUCK3_UV_THR 0x7 -10% / -100mV 0x0 -3% / -30mV
Static NVM Settings www.ti.com
18 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto
™
7 DRA829 or
TDA4VM Automotive PDN-0C
SLVUC99 – JANUARY 2022
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