Texas Instruments Jacinto 7 DRA829 - Interrupt Settings

Table 5-7. FSM NVM Settings
Register Name Field Name
TPS65941213-Q1 TPS65941111-Q1
Value Description Value Description
RAIL_SEL_1 BUCK1_GRP_SEL 0x2 SOC rail group 0x2 SOC rail group
BUCK2_GRP_SEL 0x2 SOC rail group 0x2 SOC rail group
BUCK3_GRP_SEL 0x1 MCU rail group 0x0 No group assigned
BUCK4_GRP_SEL 0x1 MCU rail group 0x0 No group assigned
RAIL_SEL_2 BUCK5_GRP_SEL 0x2 SOC rail group 0x2 SOC rail group
LDO1_GRP_SEL 0x1 MCU rail group 0x0 No group assigned
LDO2_GRP_SEL 0x1 MCU rail group 0x2 SOC rail group
LDO3_GRP_SEL 0x2 SOC rail group 0x2 SOC rail group
RAIL_SEL_3 LDO4_GRP_SEL 0x1 MCU rail group 0x2 SOC rail group
VCCA_GRP_SEL 0x1 MCU rail group 0x1 MCU rail group
FSM_TRIG_SEL_1 MCU_RAIL_TRIG 0x2 MCU power error 0x2 MCU power error
SOC_RAIL_TRIG 0x3 SOC power error 0x3 SOC power error
OTHER_RAIL_TRIG 0x1 Orderly shutdown 0x1 Orderly shutdown
SEVERE_ERR_TRIG 0x0 Immediate shutdown 0x0 Immediate shutdown
FSM_TRIG_SEL_2 MODERATE_ERR_TRI
G
0x1 Orderly shutdown 0x1 Orderly shutdown
5.8 Interrupt Settings
These settings detail the default configurations for what is monitored by nINT pin. All these settings can be
changed though I
2
C after startup.
Table 5-8. Interrupt NVM Settings
Register Name Field Name
TPS65941213-Q1 TPS65941111-Q1
Value Description Value Description
FSM_TRIG_MASK_1 GPIO1_FSM_MASK 0x1 Masked 0x1 Masked
GPIO1_FSM_MASK_P
OL
0x0 Low; Masking sets signal
value to '0'
0x0 Low; Masking sets signal
value to '0'
GPIO2_FSM_MASK 0x1 Masked 0x0 Not masked
GPIO2_FSM_MASK_P
OL
0x0 Low; Masking sets signal
value to '0'
0x0 Low; Masking sets signal
value to '0'
GPIO3_FSM_MASK 0x1 Masked 0x1 Masked
GPIO3_FSM_MASK_P
OL
0x0 Low; Masking sets signal
value to '0'
0x0 Low; Masking sets signal
value to '0'
GPIO4_FSM_MASK 0x1 Masked 0x1 Masked
GPIO4_FSM_MASK_P
OL
0x0 Low; Masking sets signal
value to '0'
0x0 Low; Masking sets signal
value to '0'
FSM_TRIG_MASK_2 GPIO5_FSM_MASK 0x1 Masked 0x1 Masked
GPIO5_FSM_MASK_P
OL
0x0 Low; Masking sets signal
value to '0'
0x0 Low; Masking sets signal
value to '0'
GPIO6_FSM_MASK 0x1 Masked 0x1 Masked
GPIO6_FSM_MASK_P
OL
0x0 Low; Masking sets signal
value to '0'
0x0 Low; Masking sets signal
value to '0'
GPIO7_FSM_MASK 0x1 Masked 0x1 Masked
GPIO7_FSM_MASK_P
OL
0x0 Low; Masking sets signal
value to '0'
0x0 Low; Masking sets signal
value to '0'
GPIO8_FSM_MASK 0x1 Masked 0x1 Masked
GPIO8_FSM_MASK_P
OL
0x0 Low; Masking sets signal
value to '0'
0x0 Low; Masking sets signal
value to '0'
Static NVM Settings www.ti.com
24 Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto
™
7 DRA829 or
TDA4VM Automotive PDN-0C
SLVUC99 – JANUARY 2022
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