Texas Instruments Jacinto 7 DRA829 - Page 25

Table 5-8. Interrupt NVM Settings (continued)
Register Name Field Name
TPS65941213-Q1 TPS65941111-Q1
Value Description Value Description
FSM_TRIG_MASK_3 GPIO9_FSM_MASK 0x1 Masked 0x1 Masked
GPIO9_FSM_MASK_P
OL
0x0 Low; Masking sets signal
value to '0'
0x0 Low; Masking sets signal
value to '0'
GPIO10_FSM_MASK 0x1 Masked 0x1 Masked
GPIO10_FSM_MASK_
POL
0x0 Low; Masking sets signal
value to '0'
0x0 Low; Masking sets signal
value to '0'
GPIO11_FSM_MASK 0x1 Masked 0x1 Masked
GPIO11_FSM_MASK_
POL
0x0 Low; Masking sets signal
value to '0'
0x0 Low; Masking sets signal
value to '0'
MASK_BUCK1_2 BUCK1_ILIM_MASK 0x0 Interrupt generated 0x0 Interrupt generated
BUCK1_OV_MASK 0x0 Interrupt generated 0x0 Interrupt generated
BUCK1_UV_MASK 0x0 Interrupt generated 0x0 Interrupt generated
BUCK2_ILIM_MASK 0x0 Interrupt generated 0x0 Interrupt generated
BUCK2_OV_MASK 0x0 Interrupt generated 0x0 Interrupt generated
BUCK2_UV_MASK 0x0 Interrupt generated 0x0 Interrupt generated
MASK_BUCK3_4 BUCK3_ILIM_MASK 0x0 Interrupt generated 0x0 Interrupt generated
BUCK3_OV_MASK 0x0 Interrupt generated 0x0 Interrupt generated
BUCK3_UV_MASK 0x0 Interrupt generated 0x0 Interrupt generated
BUCK4_OV_MASK 0x0 Interrupt generated 0x0 Interrupt generated
BUCK4_UV_MASK 0x0 Interrupt generated 0x0 Interrupt generated
BUCK4_ILIM_MASK 0x0 Interrupt generated 0x0 Interrupt generated
MASK_BUCK5 BUCK5_ILIM_MASK 0x0 Interrupt generated 0x0 Interrupt generated
BUCK5_OV_MASK 0x0 Interrupt generated 0x0 Interrupt generated
BUCK5_UV_MASK 0x0 Interrupt generated 0x0 Interrupt generated
MASK_LDO1_2 LDO1_OV_MASK 0x0 Interrupt generated 0x0 Interrupt generated
LDO1_UV_MASK 0x0 Interrupt generated 0x0 Interrupt generated
LDO2_OV_MASK 0x0 Interrupt generated 0x0 Interrupt generated
LDO2_UV_MASK 0x0 Interrupt generated 0x0 Interrupt generated
LDO1_ILIM_MASK 0x0 Interrupt generated 0x0 Interrupt generated
LDO2_ILIM_MASK 0x0 Interrupt generated 0x0 Interrupt generated
MASK_LDO3_4 LDO3_OV_MASK 0x0 Interrupt generated 0x0 Interrupt generated
LDO3_UV_MASK 0x0 Interrupt generated 0x0 Interrupt generated
LDO4_OV_MASK 0x0 Interrupt generated 0x0 Interrupt generated
LDO4_UV_MASK 0x0 Interrupt generated 0x0 Interrupt generated
LDO3_ILIM_MASK 0x0 Interrupt generated 0x0 Interrupt generated
LDO4_ILIM_MASK 0x0 Interrupt generated 0x0 Interrupt generated
MASK_VMON VCCA_OV_MASK 0x1 Interrupt not generated. 0x1 Interrupt not generated.
VCCA_UV_MASK 0x1 Interrupt not generated. 0x1 Interrupt not generated.
MASK_GPIO1_8_FALL GPIO1_FALL_MASK 0x1 Interrupt not generated. 0x1 Interrupt not generated.
GPIO2_FALL_MASK 0x1 Interrupt not generated. 0x0 Interrupt generated
GPIO3_FALL_MASK 0x1 Interrupt not generated. 0x1 Interrupt not generated.
GPIO4_FALL_MASK 0x1 Interrupt not generated. 0x1 Interrupt not generated.
GPIO5_FALL_MASK 0x1 Interrupt not generated. 0x1 Interrupt not generated.
GPIO6_FALL_MASK 0x1 Interrupt not generated. 0x1 Interrupt not generated.
GPIO7_FALL_MASK 0x1 Interrupt not generated. 0x1 Interrupt not generated.
GPIO8_FALL_MASK 0x1 Interrupt not generated. 0x1 Interrupt not generated.
www.ti.com Static NVM Settings
SLVUC99 – JANUARY 2022
Submit Document Feedback
Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto
™
7 DRA829 or
TDA4VM Automotive PDN-0C
25
Copyright © 2022 Texas Instruments Incorporated