EasyManuals Logo

Texas Instruments Jacinto 7 DRA829 User Manual

Texas Instruments Jacinto 7 DRA829
55 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Page #27 background imageLoading...
Page #27 background image
Table 5-8. Interrupt NVM Settings (continued)
Register Name Field Name
TPS65941213-Q1 TPS65941111-Q1
Value Description Value Description
MASK_COMM_ERR COMM_FRM_ERR_MA
SK
0x0 Interrupt generated 0x0 Interrupt generated
COMM_CRC_ERR_MA
SK
0x0 Interrupt generated 0x0 Interrupt generated
COMM_ADR_ERR_MA
SK
0x0 Interrupt generated 0x0 Interrupt generated
I2C2_CRC_ERR_MAS
K
0x0 Interrupt generated 0x1 Interrupt not generated.
I2C2_ADR_ERR_MAS
K
0x0 Interrupt generated 0x1 Interrupt not generated.
MASK_READBACK_E
RR
EN_DRV_READBACK_
MASK
0x0 Interrupt generated 0x1 Interrupt not generated.
NRSTOUT_SOC_
READBACK_MASK
0x0 Interrupt generated 0x1 Interrupt not generated.
MASK_ESM ESM_SOC_PIN_MASK 0x1 Interrupt not generated. 0x1 Interrupt not generated.
ESM_SOC_RST_MAS
K
0x1 Interrupt not generated. 0x1 Interrupt not generated.
ESM_SOC_FAIL_MAS
K
0x1 Interrupt not generated. 0x1 Interrupt not generated.
ESM_MCU_PIN_MASK 0x1 Interrupt not generated. 0x1 Interrupt not generated.
ESM_MCU_RST_MAS
K
0x1 Interrupt not generated. 0x1 Interrupt not generated.
ESM_MCU_FAIL_MAS
K
0x1 Interrupt not generated. 0x1 Interrupt not generated.
GENERAL_REG_1 PFSM_ERR_MASK 0x0 Interrupt generated 0x0 Interrupt generated
1. The VCCA_OV_MASK and VCCA_UV_MASK are cleared in both PMICs after the completing BOOT_BIST
but before starting the sequence, Section 6.3.8.
5.9 POWERGOOD Settings
These settings detail the default configurations for what is monitored by PGOOD pin. All these settings can be
changed though I
2
C after startup.
Table 5-9. POWERGOOD NVM Settings
Register Name Field Name
TPS65941213-Q1 TPS65941111-Q1
Value Description Value Description
PGOOD_SEL_1 PGOOD_SEL_BUCK1 0x0 Masked 0x0 Masked
PGOOD_SEL_BUCK2 0x0 Masked 0x0 Masked
PGOOD_SEL_BUCK3 0x0 Masked 0x0 Masked
PGOOD_SEL_BUCK4 0x0 Masked 0x0 Masked
PGOOD_SEL_2 PGOOD_SEL_BUCK5 0x0 Masked 0x0 Masked
PGOOD_SEL_3 PGOOD_SEL_LDO1 0x0 Masked 0x0 Masked
PGOOD_SEL_LDO2 0x0 Masked 0x0 Masked
PGOOD_SEL_LDO3 0x0 Masked 0x0 Masked
PGOOD_SEL_LDO4 0x0 Masked 0x0 Masked
www.ti.com Static NVM Settings
SLVUC99 – JANUARY 2022
Submit Document Feedback
Optimized Dual TPS6594-Q1 PMIC User Guide for Jacinto
7 DRA829 or
TDA4VM Automotive PDN-0C
27
Copyright © 2022 Texas Instruments Incorporated

Questions and Answers:

Question and Answer IconNeed help?

Do you have a question about the Texas Instruments Jacinto 7 DRA829 and is the answer not in the manual?

Texas Instruments Jacinto 7 DRA829 Specifications

General IconGeneral
BrandTexas Instruments
ModelJacinto 7 DRA829
CategoryComputer Hardware
LanguageEnglish

Related product manuals