1DVCC
2P1.0/TA0CLK/ACLK/A0/CA0
3
4
5P1.3/ADC10CLK/CAOUT/VREF-/VEREF-/A3/CA3
6
7
8P2.0/TA1.0
9P2.1/TA1.1
10P2.2/TA1.1 11 P2.3/TA1.0
12 P2.4/TA1.2
13 P2.5/TA1.2
14
15
16 RST/NMI/SBWTDIO
17 TEST/SBWTCK
18 XOUT/P2.7
19 XIN/P2.6/TA0.1
20 DVSS
P1.6/TA0.1/ CA6/TDI/TCLKUC
B0SOMI/UCB0SCL/A6/
P1.7/CAOUT /A7/CA7/TDO/TDI/UCB0SIMO/UCB0SDA
P1.1/TA0.0/ A1/CA1/UCA0RXD/UCA0SOMI
P1.2/TA0.1/ A2/CA2/UCA0TXD/UCA0SIMO
P1.4/SMCLK/ CA4/TCK/VREF+/VEREF+/A4/UCB0STE/UCA0CLK
P1.5/TA0.0/ A5/CA5/TMS/UCB0CLK/UCA0STE
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7
SLAU772A–June 2018–Revised March 2020
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MSP430G2553 LaunchPad™ Development Kit (MSP
‑
EXP430G2ET)
2.2 Hardware Features
2.2.1 MSP430G2553 MCU
The MSP430G2553 is a member of the MSP430 family of ultra-low-power MCUs. MSP430 MCUs features
different sets of peripherals targeted for various applications. The MCU architecture, combined with five
low-power modes, is optimized to achieve extended battery life in portable measurement applications.
Device features include:
• 1.8-V to 3.6-V operation
• 16-bit RISC architecture up to 16-MHz system clock
• 16KB of flash memory and 512 bytes of SRAM
• 8-channel 10-bit ADC
• 8-channel comparator
• Two 16-bit timers with three capture/compare registers (Timer_A)
• 24 GPIOs
• One universal serial communication interface (USCI_A) supports UART, IrDA, and SPI
• One USCI (USCI_B) supports SPI and I
2
C
Figure 4 shows the pinout of the MSP430G2553 20-pin N (PDIP) package.
Figure 4. MSP430G2553 20-Pin N Package (Top View)
2.2.2 eZ-FET Onboard Debug Probe With EnergyTrace Technology
To keep development easy and cost effective, TI's LaunchPad Development Kits integrate an onboard
debug probe, which eliminates the need for expensive programmers. The MSP-EXP430G2ET has the eZ-
FET debug probe (see Figure 5), which is a simple and low-cost debugger that supports all MSP430
MCUs.
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