Texas Instruments MSP430 Application Report

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12.4 Memory Allocation and Resources
BSL Internal Settings and Resources
The stack pointer is not modified, except when it points to an excluded memory area. If so, it is
initialized to 021Ah.
V1.30 or higher:
The stack pointer is not modified if the BSL is called by program via the warm-start vector. It is
initialized to 0220h if the BSL starts via the BSL RESET sequence or is called by program via the
cold-start vector.
• F1xx:
Determine basic clock module so that minimum frequency is 1.5 MHz:
BCSCTL1 = 85h (RSEL = 5, XT2Off = 1)
DCOCTL = 80h (DCO = 4, MOD = 0)
BCSCTL2 = 00h only at cold-start
SR: SCG1 = 00h (SMCLK on) only at cold-start
F2xx:
Determine basic clock module so that minimum frequency is 1.5 MHz:
BCSCTL1 = 88h (RSEL = 8, XT2Off = 1)
DCOCTL = 80h (DCO = 4, MOD = 0)
BCSCTL2 = 00h only at cold-start
SR: SCG1 = 00h (SMCLK on) only at cold-start
F4xx:
Determine FLL oscillator/system clock so that minimum frequency is 1.5 MHz:
SCFI0 = 00h (D = 0, FN_x = 0)
SCFI1 = 98h (N_DCO)
SCFQCTL: (M = 0 )
SR: SCG0 = 1 (FLL loop control off)
FLL_CTL1 = 00h only at cold-start
• SW-UART: Timer_A operates in continuous mode with MCLK source (Div = 1)
CCR0 used for compare
CCTL0 used for polling of CCIFG0
• TX pin is set to output HI for RS232 idle state
• RX pin is set to input
• Password-protected commands are locked (only at cold-start)
After system initialization, the BSL is ready for operation and waits for the first synchronization sequence
(SS) followed by a data frame containing the first BSL command.
• The BSL program code is located in the boot-ROM area 0C00h–0FEFh.
• Addresses 0FF0h–0FFFh hold the device identification.
• The BSL variables occupy the RAM area
– 0200h–0213h (V1.10)
– 0200h–0219h (V1.30 or higher)
• The BSL stack occupies the RAM area
– 0214h–0219h (V1.10)
– 021Ah–021Fh (V1.30 or higher, only at cold-start)
• The working registers used are:
– R5–R9 (V1.30 or lower) or
– R5–R10 (V1.40) or
– R5–R11 (V1.60) or
– R5-R14 (V2.00 or higher)
Their contents are not buffered.
– F1xx/F2xx:
• The basic clock module registers used are:
• DCOCTL at address 056h
• BCSCTL1 at address 057h
14 Features of the MSP430 Bootstrap Loader SLAA089D – December 1999 – Revised August 2006
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Texas Instruments MSP430 Specifications

General

Brand	Texas Instruments
Model	MSP430
Category	Microcontrollers
Language	English