Usage Notes and Known Design Exceptions to Functional Specifications
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SPRZ412K–December 2013–Revised February 2020
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TMS320F2837xD Dual-Core MCUs Silicon Revisions C, B, A, 0
Advisory Boot ROM: Calling SCI Bootloader from Application
Revision(s) Affected 0, A, B, C
Details The ROM SCI bootloader uses autobaud lock to lock the baud rate. The SCI baud rate is
split between two registers, SCILBAUD and SCIHBAUD. The ROM SCI bootloader
expects SCIHBAUD to contain its default reset value of zero. If calling the ROM SCI
bootloader from an application that modified the contents of SCIHBAUD to be non-zero,
then the SCI will not autobaud lock and the SCI bootloader will not execute.
Workaround(s) Clear SCIHBAUD to zero before calling the ROM SCI bootloader.
Advisory Boot ROM: Using CPU1 Wait Boot or CPU2 Idle Mode
Revision(s) Affected 0, A, B, C
Details The PIE Initialize Vector Table function that is part of the CPU1 and CPU2 ROMs writes
beyond the PIE vector table addresses, up to address 0x1080. If the DMA clock is
enabled before a debugger reset and CPU1 goes to wait boot (or CPU2 goes to idle
mode), then some DMA registers will be overwritten during the ROM PIE vector
initialization.
Workaround(s) None
Advisory Boot ROM: Device Will Hang During Boot if X1 Clock Source is not Present
Revision(s) Affected B
Details The device boot code will attempt to configure the device using X1 as the clock source.
When X1 is not present, the device boot will hang. This advisory applies to any system
which is designed to use the INTOSC as the primary clock source with no clock on X1
during boot. This issue only affects some silicon revision B devices and it will be fixed in
all future silicon revisions.
Workaround(s) Apply external clock source to X1 on silicon revision B devices, even if using INTOSC as
the application clock source.
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