VIPA CPU 214 User Manual

Manual VIPA CPU 21x Chapter 8 Deployment CPU 21xCAN
HB103E - Rev. 05/45 8-1
Chapter 8 Deployment CPU 21xCAN
Content of this chapter is the Deployment of the CPU 21xCAN under
CANopen. Here you’ll find all information required for the usage of the
integrated CAN master.
Below follows a description of:
• CAN-Bus principles
• Project engineering CAN master and CPU
• Course diagram after POWER ON
• Process image for RPDOs and TPDOs
• Telegram structure and overview over the supported objects
• Device model with description of PDOs and SDOs
• Objects directory
Topic Page
Chapter 8
Deployment CPU 21xCAN...............................................8-1
Principles CAN-Bus..............................................................................8-2
Project engineering of the CPU 21xCAN..............................................8-4
Modes ................................................................................................8-13
Process image of the CPU 21xCAN...................................................8-14
CANopen - Messages ........................................................................8-16
Object directory..................................................................................8-21
Overview
Contents

VIPA CPU 214 Specifications

General

Type	CPU 214
Number of timers	256
Number of counters	256
Digital Outputs	16
Analog Inputs	4
Analog Outputs	2
Communication Ports	1
Communication	MPI
Interface	RS485
Transmission rate	187.5 kbit/s
Protocol	MPI
S7-compatible commands	Yes
Number of modules	8
Power Supply	24V DC
Current consumption (with load)	500 mA
Protection Class	IP20
Weight	500g
Operating Temperature	0°C to 60°C
Processor	32-bit
Number of flags	256