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VIPA CPU 214 User Manual

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Manual VIPA CPU 21x Chapter 8 Deployment CPU 21xCAN
HB103E - Rev. 05/45 8-1
Chapter 8 Deployment CPU 21xCAN
Content of this chapter is the Deployment of the CPU 21xCAN under
CANopen. Here you’ll find all information required for the usage of the
integrated CAN master.
Below follows a description of:
CAN-Bus principles
Project engineering CAN master and CPU
Course diagram after POWER ON
Process image for RPDOs and TPDOs
Telegram structure and overview over the supported objects
Device model with description of PDOs and SDOs
Objects directory
Topic Page
Chapter 8
Deployment CPU 21xCAN...............................................8-1
Principles CAN-Bus..............................................................................8-2
Project engineering of the CPU 21xCAN..............................................8-4
Modes ................................................................................................8-13
Process image of the CPU 21xCAN...................................................8-14
CANopen - Messages ........................................................................8-16
Object directory..................................................................................8-21
Overview
Contents

Table of Contents

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VIPA CPU 214 Specifications

General IconGeneral
TypeCPU 214
Number of timers256
Number of counters256
Digital Outputs16
Analog Inputs4
Analog Outputs2
Communication Ports1
CommunicationMPI
InterfaceRS485
Transmission rate187.5 kbit/s
ProtocolMPI
S7-compatible commandsYes
Number of modules8
Power Supply24V DC
Current consumption (with load)500 mA
Protection ClassIP20
Weight500g
Operating Temperature0°C to 60°C
Processor32-bit
Number of flags256

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