Vortex IR610 Series - Page 140

IR610 high performance vector control frequency inverter user manual Chapter 5 function code table
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Input Ref
(P43.02 The value of the
selected function code)
Parameter bit selection
P43.03=x
Delay processing
P43.04, P43.05
0-not
reversed
1-reverse
Logical selection
No. 0 of P43.01
Delay unit 1
output
parameter
selection
P43.02
0
1
input
output
P43.04 P43.05
0123456789101112131415
Take the xth (0~15) bit
of Ref
Delay unit 1 block diagram
The picture shows the delay unit 1 block diagram, delay unit 2 to 4 and so on. Delay unitsDelay can be used for
DI/DO delay processing also can be combined with comparator units and logic units for more complex applications.
P43.01
Delay unit 1-4
logicl
0000B～1111B
Bit0~Bit3 corresponds to delay units 1~4,
which are used to specify whether the output
of the delay unit is inverted.
0
☆
P43.02
Delay unit 1
input parameter
selection
00.00-98.99(function code index)
00.00
☆
P43.03
Delay unit 1
input bit
selection
0-15
0
☆
P43.04
Delay unit 1
rising edge
delay time
0.0s～3000.0s
0.0s
☆
P43.05
Delay unit 1
descending
edge delay time
0.0s～3000.0s
0.0s
☆
P43.06
Delay unit 2
input parameter
selection
00.00-98.99(function code index)
00.00
☆
P43.07
Delay unit 2
input bit
selection
0-15
0
☆
P43.08
Delay unit2
rising edge
delay time
0.0s～3000.0s
0.0s
☆
P43.09
Delay
unit2descending
0.0s～3000.0s
0.0s
☆