Production Data WM8804
w
PD Rev 4.1 September 2007
59
REGISTER
ADDRESS
BIT LABEL DEFAULT DESCRIPTION
3:0 SRCNUM
[3:0]
0000 Source Number
Refer to S/PDIF specification (IEC 60958-3) for
full details.
Channel Number for Subframe 1
CHNUM1 Channel Status Bits[21:20]
Function
00 Do not use channel number
01 Send to Left Channel
10 Send to Right Channel
5:4 CHNUM1[1:0] 00
11 Do not use channel number
Channel Number for Subframe 2
CHNUM2 Channel Status Bits[23:22]
Function
00 Do not use channel number
01 Send to Left Channel
10 Send to Right Channel
R20
SPDTX3
14h
7:6 CHNUM2[1:0] 00
11 Do not use channel number
3:0 FREQ[3:0] 0001 Indicated Sampling Frequency
Refer to S/PDIF specification (IEC 60958-3) for
full details.
0001 = Sampling Frequency not indicated.
5:4 CLKACU[1:0] 11 Clock Accuracy of Transmitted Clock
00 = Level II
01 = Level I
10 = Level III
11 = Interface frame rate not matched to
sampling frequency.
6 TXSRC 1 S/PDIF Transmitter Data Source
0 = S/PDIF Received Data – SPDIFTXCLK
Source = CLK2
1 = Digital Audio Interface Received Data –
SPDIFTXCLK Source = MCLK Input/Output
Signal at MCLK Pin
R21
SPDTX4
15h
7 TXSTATSRC 0 S/PDIF Transmitter Channel Status Data
Source
0 = Received channel status data
1 = Transmit channel status registers
Note : Only used if TXSRC=0
0 MAXWL 1 Maximum Audio Sample Word Length
0 = 20 bits
1 = 24 bits
Audio Sample Word Length
Used with MAXWL to indicate Tx word length
000 = Word length not indicated
TXWL[2:0] MAXWL==1 MAXWL==0
001 20 bits 16 bits
010 22 bits 18 bits
100 23 bits 19 bits
101 24 bits 20 bits
110 21 bits 17 bits
3:1 TXWL[2:0] 101
All other combinations reserved
R22
SPDTX5
16h
7:4 ORGSAMP
[3:0]
0000 Original Sampling Frequency
Refer to S/PDIF specification (IEC 60958-3) for
full details.
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