WM8804 Production Data
w
PD Rev 4.1 September 2007
60
REGISTER
ADDRESS
BIT LABEL DEFAULT DESCRIPTION
R23
GPO0
17h
3:0 GPO0[3:0] 0000
R24
GPO1
18h
3:0 GPO1[3:0] 0111
R26
GPO2
1Ah
7:4 GPO2[3:0] 0100
Flags and Status bits available on GPO pins
0000 = INT_N
0001 = V
0010 = U
0011 = C
0100 = TRANS_ERR
0101 = SFRM_CLK
0110 = 192BLK
0111 = UNLOCK
1000 = NON_AUDIO
1001 = CSUD
1010 = DEEMPH
1011 = CPY_N
1100 = ZEROFLAG
1101 = 0
ā
1111 = 0
Note: GPO1 and GPO2 is only available in 2-
wire software control mode.
1:0 AIFTX_FMT[1:0] 10 Audio Data Format Select
11: DSP mode
10: I
2
S mode
01: Left justified mode
00: Right justified mode
3:2 AIFTX_WL[1:0] 01 Audio Data Word Length Select
11: 24 bits
10: 24 bits
01: 20 bits
00: 16 bits
4 AIFTX_BCP 0 BCLK Invert (for master and slave modes)
0 = BCLK not inverted
1 = BCLK inverted
R27
AIFTX
1Bh
5 AIFTX_LRP 0 Right, left and I
2
S modes ā LRCLK polarity and
DSP mode select
1 = invert LRCLK polarity / DSP Mode B
0 = normal LRCLK polarity / DSP Mode A
1:0 AIFRX_FMT[1:0] 10 Audio Data Format Select
11: DSP mode
10: I
2
S mode
01: Left justified mode
00: Right justified mode
3:2 AIFRX_WL[1:0] 01 Audio Data Word Length Select
11: 24 bits
10: 24 bits
01: 20 bits
00: 16 bits
R28
AIFRX
1Ch
4 AIFRX_BCP 0 BCLK Invert (for master and slave modes)
0 = BCLK not inverted
1 = BCLK inverted