Xilinx Alveo U250 User Manual

In addion, the following code must be placed in the project XDC le to correctly congure the
MCS le.
# Bitstream Configuration
# ------------------------------------------------------------------------
set_property CONFIG_VOLTAGE 1.8 [current_design]
set_property BITSTREAM.CONFIG.CONFIGFALLBACK Enable [current_design]
set_property BITSTREAM.GENERAL.COMPRESS TRUE [current_design]
set_property CONFIG_MODE SPIx4 [current_design]
set_property BITSTREAM.CONFIG.SPI_BUSWIDTH 4 [current_design]
set_property BITSTREAM.CONFIG.CONFIGRATE 85.0 [current_design]
set_property BITSTREAM.CONFIG.EXTMASTERCCLK_EN disable [current_design]
set_property BITSTREAM.CONFIG.SPI_FALL_EDGE YES [current_design]
set_property BITSTREAM.CONFIG.UNUSEDPIN Pullup [current_design]
set_property BITSTREAM.CONFIG.SPI_32BIT_ADDR Yes [current_design]
# ------------------------------------------------------------------------
Program the Alveo Card
Aer the MCS le is created, see the procedure in the "Programming the FPGA Device" chapter
in the Vivado Design Suite User Guide: Programming and Debugging (UG908) to connect to the
Alveo Data Center accelerator card using the hardware manager.
1. Select Add Conguraon Device and select the mt25qu01g-spi-x1_x2_x4 part.
2. Right-click the target to select Program the Conguraon Memory Device.
a. Select the MCS le target.
b. Select Conguraon File Only.
c. Click OK.
3. Aer programming has completed, disconnect the card in the hardware manager, and
disconnect the USB cable from the Alveo accelerator card.
4. Perform a cold reboot on the host machine to complete the card update.
Chapter 1: Introduction
UG1289 (v1.1.1) November 20, 2019 www.xilinx.com
Alveo U200 and U250 Accelerator Cards 13
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Xilinx Alveo U250 Specifications

General

Brand	Xilinx
Model	Alveo U250
Category	Computer Hardware
Language	English