Xilinx Alveo U250

Block Diagram
The block diagram of the Alveo U200/U250 accelerator card is shown in the following gure.
Figure 2: Card Block Diagram
Clocks
U200: XCU200 D2104
U250: XCU250 D2104
PCIe GEN1/2/3 x 1/2/4/8/16
QSFP #2
XADC
LEDs
QSFP #1
QSPI
Power
288-pin DIMM interface
64-bit + ECC dual rank support
x4/x8 UDIMM support
PC4-2400 compatible
C0
288-pin DIMM interface
64-bit + ECC dual rank support
x4/x8 UDIMM support
PC4-2400 compatible
C2
288-pin DIMM interface
64-bit + ECC dual rank support
x4/x8 UDIMM support
PC4-2400 compatible
C3
288-pin DIMM interface
64-bit + ECC dual rank support
x4/x8 UDIMM support
PC4-2400 compatible
C1
X23433-102419
Card Features
The Alveo U200/U250 accelerator card features are listed in this secon. Detailed informaon
for each feature is provided in Chapter 3: Card Component Descripon.
• Alveo U200 accelerator card:
○ Virtex UltraScale+ XCU200-2FSGD2104E FPGA
• Alveo U250 accelerator card:
○ Virtex UltraScale+ XCU250-2LFIGD2104E FPGA
Chapter 1: Introduction
UG1289 (v1.1.1) November 20, 2019 www.xilinx.com
Alveo U200 and U250 Accelerator Cards 7
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