AC701 Getting Started Guide www.xilinx.com 35
UG967 (v3.0) July 10, 2013
Advanced Bring-up with Base Targeted Reference Design
2. Verify TRD operations through the status information provided by the GUI as shown
in Figure 27:
a. Verify PCIe endpoint throughput.
b. Verify the DMA Channel throughput for Datapath-0.
c. Verify the DMA Channel throughput for Datapath-1.
d. Verify that there are no buffer descriptor errors for error-free operation.
3. Click the Performance Plots tab. The system-to-card and card-to-system performance
numbers for a specific packet size are shown. The packet size can be adjusted and the
resulting performance variation observed.
4. Close the GUI. This uninstalls the driver and opens the driver installation options
screen of the Artix-7 FPGA base TRD. Driver un-installation requires the control and
monitoring GUI to first be closed.
This completes system performance evaluation of the Artix-7 FPGA base TRD using the
pre-built demonstration bit file. The reference design can now be modified. The Vivado
Design Suite must be installed before proceeding with custom modifications. The design
tools do not need to be installed on the same host PC in which the AC701 evaluation board
is installed.
X-Ref Target - Figure 27
Figure 27: Verifying Error-free Operation and Performance Plots
UG967_27_121812
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