Xilinx Kintex-7 FPGA KC705 Getting Started

KC705 Getting Started Guide www.xilinx.com UG913 (v3.0.2) April 23, 2013
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Revision History
The following table shows the revision history for this document.
Date Version Revision
05/23/2012 1.0
Initial Xilinx release.
05/31/2012 1.0.1
Updated PDF document properties.
08/16/2012 1.1
Replaced ISE software with Xilinx Design Tools throughout. Added Vivado tools to KC705
Embedded Kit Contents, page 5. Updated URL for Kintex-7 FPGA embedded kit in What’s
Available Online, page 6. Updated Figure 1-1, Figure 1-4, Figure 1-5, Figure 1-7, and Figure 1-8.
Updated steps in Running the Video Demonstration, page 9. Updated Next Steps, page 15.
Updated Table 1-1. Added Documentation, page 16. Updated title of Appendix B, Installation
and Licensing of Xilinx Design Tools.
10/31/2012 1.2
Removed mention of flash drives throughout. Added jumper settings to step of Video
Demonstration Hardware Setup Instructions, page 8. In step 3 of Running the Video
Demonstration, page 9, changed 14.1 to 14.x.
11/27/2012 1.2.1
Updated XPN number on the title page.
01/24/2013 2.0
Updated jumper settings in step of Video Demonstration Hardware Setup Instructions. Added
“(ISE Design Suite 14.4)” to document title.
04/12/2013 2.0.1
Removed XPN number from the title page. No other changes.
04/12/2013 3.0
Updated for ISE® Design Suite 14.5. Two of the local cores, DVI2AXI and PERF_MONITOR, were
replaced with EDK build IPs. Figure 1-1 was updated and different color codes are used to
differentiate local and EDK IPs. Figure 1-5 was updated. Appendixes were re-sequenced and
Appendix C was enhanced.
04/17/2013 3.0.1
Updated links for UG914 and UG915.
04/23/2013 3.0.2
Updated links for UG914 and UG915.

Xilinx Kintex-7 FPGA KC705 Specifications

General

FPGA Speed Grade	-2
FPGA Package	FFG900
Logic Cells	326, 080
DSP Slices	840
Clock Management Tiles	10
Transceivers	16
DDR3 Memory	1GB
Flash Memory	128MB
Clock	200 MHz oscillator
Form Factor	ATX
Ethernet	10/100/1000
Expansion Connectors	FMC
USB	USB-UART