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Xilinx LogiCORE 1000BASE-X - Page 143

Xilinx LogiCORE 1000BASE-X
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Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 143
UG155 March 24, 2008
Management Registers
R
Register 15: SGMII Extended Status
MDIO Register 15: SGMII Extended Status
Table 9-27: SGMII Extended Status Register (Register 15)
Bit(s) Name Description Attributes Default Value
15.15 1000BASE-X
Full Duplex
Always returns a ‘1’ for this bit since
1000BASE-X Full Duplex is
supported
returns 1 1
15.14 1000BASE-X
Half Duplex
Always returns a ‘0’ for this bit since
1000BASE-X Half Duplex is not
supported
returns 0 0
15.13 1000BASE-T
Full Duplex
Always returns a ‘0’ for this bit since
1000BASE-T Full Duplex is not
supported
returns 0 0
15.12 1000BASE-T
Half Duplex
Always returns a ‘0’ for this bit since
1000BASE-T Half Duplex is not
supported
returns 0 0
15:11:0 Reserved Always return 0s returns 0s 000000000000
1000BASE-X FULL DUPLEX
1000BASE-X HALF DUPLEX
1000BASE-T FULL DUPLEX
15 14 13 12 11 0
Reg 15
RESERVED
1000BASE-T HALF DUPLEX

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