Xilinx LogiCORE 1000BASE-X - Page 149

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 149
UG155 March 24, 2008
Management Registers
R
Registers 2 and 3: PHY Identifier
Register 4: SGMII Auto-Negotiation Advertisement
MDIO Registers 2 and 3: PHY Identifier
Table 9-32: PHY Identifier (Registers 2 and 3)
Bit(s) Name Description Attributes Default Value
2.15:0 Organizationally Unique
Identifier
Always return 0s returns 0s 0000000000000000
3.15:10 Organizationally Unique
Identifier
Always return 0s
returns 0s 000000
3.9:4 Manufacturer’s model
number
Always return 0s
returns 0s 000000
3.3:0 Revision Number
Always return 0s
returns 0s 0000
ORGANIZE UNIQUE ID
15 0
Reg 2
15
0
Reg 3
ORGANIZE UNIQUE ID
10 9 43
MAUFACTURER MODEL NO REVISION NO
MDIO Register 4: SGMII Auto-Negotiation Advertisement
Table 9-33: SGMII Auto-Negotiation Advertisement (Register 4)
Bit(s) Name Description Attributes Default Value
4.15:0 All bits Ignore this register because
Auto-Negotiation is not
included
read only 0000000000000001
LOGIC 0's
15 0
Reg 4
1
LOGIC 1