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Xilinx LogiCORE 1000BASE-X - Page 193

Xilinx LogiCORE 1000BASE-X
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Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 193
UG155 March 24, 2008
Integrating with the Tri-Mode Ethernet MAC Core
R
Figure 13-9: Tri-Speed Ethernet MAC Extended to use an SGMII in Virtex-5 LXT/SXT
Tri-Speed
Ethernet
MAC
LogiCORE
phyemacrxd[7:0]
phyemacrxdv
phyemacrxer
emacphytxd7:0]
emacphytxen
emacphytxer
emacphymclkout
phyemacmdin
emacphymdout
emacphymdtri
Ethernet
1000BASE-X
PCS/PMA
or SGMII
LogiCORE
gmii_rxd[7:0]
gmii_rx_dv
gmii_rx_er
gmii_txd[7:0]
gmii_tx_en
gmii_tx_er
mdc
mdio_in
mdio_out
mdio_tri
no
connection
userclk2
RocketIO I/F
gmii_rxd_out[7:0]
gmii_rx_dv_out
gmii_rx_er_out
gmii_txd_in[7:0]
gmii_tx_en_in
gmii_tx_er_in
gmii_rxd_in[7:0]
gmii_rx_dv_in
gmii_rx_er_in
gmii_txd_out[7:0]
gmii_tx_en_out
gmii_tx_er_out
clk125m
SGMII Adaptation
module
sgmii_clk_en
speed_is_10_100
speed_is_100
speedis10100
speedis100
rxgmiimiiclk
txgmiimiiclk
corehassgmii
VCC
clientemacrxenable
clientemactxenable
sgmii_clk_r
NC
Virtex-5
GTP
RocketIO
CLKIN
TXUSRCLK0
TXUSRCLK20
userclk2
(125 MHz)
userclk
BUFG
REFCLKOUT
component_name_block
(Block Level from example design)
clkin
(125MHz)
IBUFGDS
IPAD
brefclkp
IPAD
brefclkn

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