Xilinx LogiCORE 1000BASE-X - Page 63

Ethernet 1000BASE-X PCS/PMA or SGMII v9.1 www.xilinx.com 63
UG155 March 24, 2008
Implementing External GMII
R
Spartan-3, Spartan-3E and Spartan-3A Devices
The logic described previously for Virtex-II and Virtex-II Pro devices does not meet the
input setup and hold requirements for GMII with Spartan-3, Spartan-3E, and Spartan-3A
devices. A DCM must be used on the gmii_tx_clk clock path, as illustrated in
Figure 5-15. This is performed by the top-level example design delivered with the core (all
signal names and logic match Figure 5-15). This DCM circuitry may optionally be used in
other families.
Phase-shifting may then be applied to the DCM to fine-tune the setup and hold times at the
GMII IOB input flip-flops. The fixed phase shift is applied to the DCM with the example
UCF for the example design. See “Constraints When Implementing an External GMII” in
Chapter 12.
Figure 5-15: External GMII Transmitter Logic for Spartan-3, Spartan-3E and Spartan-3A Devices
gmii_txd[0]
IBUF
gmii_txd_ibuf[0]
D
Q
gmii_tx_en
gmii_tx_en_ibuf
gmii_tx_er
gmii_tx_er_ibuf
gmii_txd[0]
gmii_tx_en
gmii_tx_er
Ethernet 1000BASE-X
PCS/PMA
or SGMII LogiCORE
IPAD
IPAD
IPAD
IBUF
IBUF
D
Q
D
Q
gmii_txd_int[0]
gmii_tx_en_int
gmii_tx_er_int
Transmitter
Elastic
Buffer
userclk2 (if RocketIO is used)
gtx_clk (if TBI is used)
gmii_tx_clk
IBUFG
IOB LOGIC
IPAD
gmii_tx_clk_ibufg
BUFG
gmii_tx_clk_bufg
DCM
CLKIN
CLK0
FB